Zircon technology Verilog with uart communication, the file includes the module and the top file, the direct decompression can be compiled on the quartus.

A4_Uart_tx\A4_Uart_tx.qpf
A4_Uart_tx\A4_Uart_tx.qsf
A4_Uart_tx\A4_Uart_tx.qws
A4_Uart_tx\A4_Uart_tx.v
A4_Uart_tx\A4_Uart_tx.v.bak
A4_Uart_tx\A4_Uart_tx_nativelink_simulation.rpt
A4_Uart_tx\db\.cmp.kpt
A4_Uart_tx\db\A4_Uart_tx.asm.qmsg
A4_Uart_tx\db\A4_Uart_tx.asm.rdb
A4_Uart_tx\db\A4_Uart_tx.asm_labs.ddb
A4_Uart_tx\db\A4_Uart_tx.cbx.xml
A4_Uart_tx\db\A4_Uart_tx.cmp.bpm
A4_Uart_tx\db\A4_Uart_tx.cmp.cdb
A4_Uart_tx\db\A4_Uart_tx.cmp.hdb
A4_Uart_tx\db\A4_Uart_tx.cmp.idb
A4_Uart_tx\db\A4_Uart_tx.cmp.logdb
A4_Uart_tx\db\A4_Uart_tx.cmp.rdb
A4_Uart_tx\db\A4_Uart_tx.cmp_merge.kpt
A4_Uart_tx\db\A4_Uart_tx.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
A4_Uart_tx\db\A4_Uart_tx.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd
A4_Uart_tx\db\A4_Uart_tx.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
A4_Uart_tx\db\A4_Uart_tx.db_info
A4_Uart_tx\db\A4_Uart_tx.eda.qmsg
A4_Uart_tx\db\A4_Uart_tx.fit.qmsg
A4_Uart_tx\db\A4_Uart_tx.hier_info
A4_Uart_tx\db\A4_Uart_tx.hif
A4_Uart_tx\db\A4_Uart_tx.ipinfo
A4_Uart_tx\db\A4_Uart_tx.lpc.html
A4_Uart_tx\db\A4_Uart_tx.lpc.rdb
A4_Uart_tx\db\A4_Uart_tx.lpc.txt
A4_Uart_tx\db\A4_Uart_tx.map.ammdb
A4_Uart_tx\db\A4_Uart_tx.map.bpm
A4_Uart_tx\db\A4_Uart_tx.map.cdb
A4_Uart_tx\db\A4_Uart_tx.map.hdb
A4_Uart_tx\db\A4_Uart_tx.map.kpt
A4_Uart_tx\db\A4_Uart_tx.map.logdb
A4_Uart_tx\db\A4_Uart_tx.map.qmsg
A4_Uart_tx\db\A4_Uart_tx.map.rdb
A4_Uart_tx\db\A4_Uart_tx.map_bb.cdb
A4_Uart_tx\db\A4_Uart_tx.map_bb.hdb
A4_Uart_tx\db\A4_Uart_tx.map_bb.logdb
A4_Uart_tx\db\A4_Uart_tx.npp.qmsg
A4_Uart_tx\db\A4_Uart_tx.pre_map.hdb
A4_Uart_tx\db\A4_Uart_tx.pti_db_list.ddb
A4_Uart_tx\db\A4_Uart_tx.root_partition.map.reg_db.cdb
A4_Uart_tx\db\A4_Uart_tx.routing.rdb
A4_Uart_tx\db\A4_Uart_tx.rtlv.hdb
A4_Uart_tx\db\A4_Uart_tx.rtlv_sg.cdb
A4_Uart_tx\db\A4_Uart_tx.rtlv_sg_swap.cdb
A4_Uart_tx\db\A4_Uart_tx.sgate.nvd
A4_Uart_tx\db\A4_Uart_tx.sgate_sm.nvd
A4_Uart_tx\db\A4_Uart_tx.sgdiff.cdb
A4_Uart_tx\db\A4_Uart_tx.sgdiff.hdb
A4_Uart_tx\db\A4_Uart_tx.sld_design_entry.sci
A4_Uart_tx\db\A4_Uart_tx.sld_design_entry_dsc.sci
A4_Uart_tx\db\A4_Uart_tx.smart_action.txt
A4_Uart_tx\db\A4_Uart_tx.sta.qmsg
A4_Uart_tx\db\A4_Uart_tx.sta.rdb
A4_Uart_tx\db\A4_Uart_tx.sta_cmp.8_slow_1200mv_85c.tdb
A4_Uart_tx\db\A4_Uart_tx.tiscmp.fastest_slow_1200mv_0c.ddb
A4_Uart_tx\db\A4_Uart_tx.tiscmp.fastest_slow_1200mv_85c.ddb
A4_Uart_tx\db\A4_Uart_tx.tiscmp.fast_1200mv_0c.ddb
A4_Uart_tx\db\A4_Uart_tx.tiscmp.slow_1200mv_0c.ddb
A4_Uart_tx\db\A4_Uart_tx.tiscmp.slow_1200mv_85c.ddb
A4_Uart_tx\db\A4_Uart_tx.tis_db_list.ddb
A4_Uart_tx\db\A4_Uart_tx.vpr.ammdb
A4_Uart_tx\db\logic_util_heursitic.dat
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.db_info
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.root_partition.cmp.ammdb
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.root_partition.cmp.cdb
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.root_partition.cmp.dfp
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.root_partition.cmp.hdb
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.root_partition.cmp.logdb
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.root_partition.cmp.rcfdb
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.root_partition.map.cdb
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.root_partition.map.dpi
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.root_partition.map.hbdb.cdb
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.root_partition.map.hbdb.hb_info
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.root_partition.map.hbdb.hdb
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.root_partition.map.hbdb.sig
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.root_partition.map.hdb
A4_Uart_tx\incremental_db\compiled_partitions\A4_Uart_tx.root_partition.map.kpt
A4_Uart_tx\incremental_db\README
A4_Uart_tx\output_files\A4_Uart_tx.asm.rpt
A4_Uart_tx\output_files\A4_Uart_tx.done
A4_Uart_tx\output_files\A4_Uart_tx.eda.rpt
A4_Uart_tx\output_files\A4_Uart_tx.fit.rpt
A4_Uart_tx\output_files\A4_Uart_tx.fit.smsg
A4_Uart_tx\output_files\A4_Uart_tx.fit.summary
A4_Uart_tx\output_files\A4_Uart_tx.flow.rpt
A4_Uart_tx\output_files\A4_Uart_tx.jdi
A4_Uart_tx\output_files\A4_Uart_tx.map.rpt
A4_Uart_tx\output_files\A4_Uart_tx.map.summary
A4_Uart_tx\output_files\A4_Uart_tx.pin
A4_Uart_tx\output_files\A4_Uart_tx.sof
A4_Uart_tx\output_files\A4_Uart_tx.sta.rpt
A4_Uart_tx\output_files\A4_Uart_tx.sta.summary
A4_Uart_tx\simulation\modelsim\0414.cr.mti
A4_Uart_tx\simulation\modelsim\0414.mpf
A4_Uart_tx\simulation\modelsim\A4_Uart_tx.sft

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