Description: SPI communication protocol, using third kinds of CPOL=1, CPHA=1, (1) through edge detection technology to get SCK rising edge and falling edge mark, for the next state machine in the data sampling and sending.
(2) according to the sequence diagram, 1 state machines are used to implement the data sampling on the rising edge of SCK (the firmware does not call the data sent along the falling edge). Whether it is sampling or sending, are all high before, from Bit[7] to Bit[0], a total of 8 bits of data. The collected eight bit data is stored in a 16 bit register.
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fpga_instantiation\db\logic_util_heursitic.dat
fpga_instantiation\db\prev_cmp_spi_orth.qmsg
fpga_instantiation\db\spi_orth.asm.qmsg
fpga_instantiation\db\spi_orth.asm.rdb
fpga_instantiation\db\spi_orth.asm_labs.ddb
fpga_instantiation\db\spi_orth.cbx.xml
fpga_instantiation\db\spi_orth.cmp.bpm
fpga_instantiation\db\spi_orth.cmp.cdb
fpga_instantiation\db\spi_orth.cmp.hdb
fpga_instantiation\db\spi_orth.cmp.idb
fpga_instantiation\db\spi_orth.cmp.kpt
fpga_instantiation\db\spi_orth.cmp.logdb
fpga_instantiation\db\spi_orth.cmp.rdb
fpga_instantiation\db\spi_orth.cmp_merge.kpt
fpga_instantiation\db\spi_orth.cycloneive_io_sim_cache.31um_ff_1000mv_0c_fast.hsd
fpga_instantiation\db\spi_orth.cycloneive_io_sim_cache.31um_tt_1000mv_0c_slow.hsd
fpga_instantiation\db\spi_orth.cycloneive_io_sim_cache.31um_tt_1000mv_85c_slow.hsd
fpga_instantiation\db\spi_orth.db_info
fpga_instantiation\db\spi_orth.eda.qmsg
fpga_instantiation\db\spi_orth.fit.qmsg
fpga_instantiation\db\spi_orth.hier_info
fpga_instantiation\db\spi_orth.hif
fpga_instantiation\db\spi_orth.ipinfo
fpga_instantiation\db\spi_orth.lpc.html
fpga_instantiation\db\spi_orth.lpc.rdb
fpga_instantiation\db\spi_orth.lpc.txt
fpga_instantiation\db\spi_orth.map.ammdb
fpga_instantiation\db\spi_orth.map.bpm
fpga_instantiation\db\spi_orth.map.cdb
fpga_instantiation\db\spi_orth.map.hdb
fpga_instantiation\db\spi_orth.map.kpt
fpga_instantiation\db\spi_orth.map.logdb
fpga_instantiation\db\spi_orth.map.qmsg
fpga_instantiation\db\spi_orth.map.rdb
fpga_instantiation\db\spi_orth.map_bb.cdb
fpga_instantiation\db\spi_orth.map_bb.hdb
fpga_instantiation\db\spi_orth.map_bb.logdb
fpga_instantiation\db\spi_orth.pplq.rdb
fpga_instantiation\db\spi_orth.pre_map.hdb
fpga_instantiation\db\spi_orth.pti_db_list.ddb
fpga_instantiation\db\spi_orth.root_partition.map.reg_db.cdb
fpga_instantiation\db\spi_orth.routing.rdb
fpga_instantiation\db\spi_orth.rpp.qmsg
fpga_instantiation\db\spi_orth.rtlv.hdb
fpga_instantiation\db\spi_orth.rtlv_sg.cdb
fpga_instantiation\db\spi_orth.rtlv_sg_swap.cdb
fpga_instantiation\db\spi_orth.sgate.rvd
fpga_instantiation\db\spi_orth.sgate_sm.rvd
fpga_instantiation\db\spi_orth.sgdiff.cdb
fpga_instantiation\db\spi_orth.sgdiff.hdb
fpga_instantiation\db\spi_orth.sld_design_entry.sci
fpga_instantiation\db\spi_orth.sld_design_entry_dsc.sci
fpga_instantiation\db\spi_orth.smart_action.txt
fpga_instantiation\db\spi_orth.smp_dump.txt
fpga_instantiation\db\spi_orth.sta.qmsg
fpga_instantiation\db\spi_orth.sta.rdb
fpga_instantiation\db\spi_orth.sta_cmp.8L_slow_1000mv_85c.tdb
fpga_instantiation\db\spi_orth.syn_hier_info
fpga_instantiation\db\spi_orth.tiscmp.fastest_slow_1000mv_0c.ddb
fpga_instantiation\db\spi_orth.tiscmp.fastest_slow_1200mv_85c.ddb
fpga_instantiation\db\spi_orth.tiscmp.fast_1000mv_0c.ddb
fpga_instantiation\db\spi_orth.tiscmp.slow_1000mv_0c.ddb
fpga_instantiation\db\spi_orth.tiscmp.slow_1000mv_85c.ddb
fpga_instantiation\db\spi_orth.tis_db_list.ddb
fpga_instantiation\db\spi_orth.tmw_info
fpga_instantiation\db\spi_orth.vpr.ammdb
fpga_instantiation\filter.v
fpga_instantiation\filter.v.bak
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.db_info
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.cmp.ammdb
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.cmp.cdb
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.cmp.dfp
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.cmp.hdb
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.cmp.kpt
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.cmp.logdb
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.cmp.rcfdb
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.map.cdb
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.map.dpi
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.map.hbdb.cdb
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.map.hbdb.hb_info
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.map.hbdb.hdb
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.map.hbdb.sig
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.map.hdb
fpga_instantiation\incremental_db\compiled_partitions\spi_orth.root_partition.map.kpt
fpga_instantiation\incremental_db\README
fpga_instantiation\output_files\spi_orth.asm.rpt
fpga_instantiation\output_files\spi_orth.done
fpga_instantiation\output_files\spi_orth.eda.rpt
fpga_instantiation\output_files\spi_orth.fit.rpt
fpga_instantiation\output_files\spi_orth.fit.smsg
fpga_instantiation\output_files\spi_orth.fit.summary
fpga_instantiation\output_files\spi_orth.flow.rpt
fpga_instantiation\output_files\spi_orth.jdi
fpga_instantiation\output_files\spi_orth.map.rpt
fpga_instantiation\output_files\spi_orth.map.summary
fpga_instantiation\output_files\spi_orth.pin
fpga_instantiation\output_files\spi_orth.sof
fpga_instantiation\output_files\spi_orth.sta.rpt
fpga_instantiation\output_files\spi_orth.sta.summary
fpga_instantiation\plus.v
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