- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 2kb
- Update:
- 2017-11-20
- Downloads:
- 0 Times
- Uploaded by:
- 刘阳
Description: Asynchronous fifo, asynchronous first out, verliog HDL code, has been debugged
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File list (Check if you may need any files):
| Filename | Size | Date |
|---|
| asyn_fifo\asyn_fifo.qpf | 1279 | 2015-06-10
|
| asyn_fifo\asyn_fifo.qsf | 2566 | 2015-06-10
|
| asyn_fifo\asyn_fifo.v | 53 | 2015-06-10
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| asyn_fifo\asyn_fifo.v.bak | 44 | 2015-06-10
|
| asyn_fifo\db\asyn_fifo.db_info | 152 | 2015-06-10
|
| asyn_fifo\db\asyn_fifo.sld_design_entry.sci | 211 | 2015-06-10
|
| asyn_fifo\db
|
| asyn_fifo |
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