- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 112kb
- Update:
- 2017-12-26
- Downloads:
- 0 Times
- Uploaded by:
- 庄玉龙
Description: The digital tube displays the source code of the beginner. Hope to pass through
To Search:
File list (Check if you may need any files):
| Filename | Size | Date |
|---|
| xsym
|
| xsym\db
|
| xsym\db\mux_lpc.tdf | 3789 | 2017-10-10
|
| xsym\db\prev_cmp_xsym.asm.qmsg | 2170 | 2017-10-10
|
| xsym\db\prev_cmp_xsym.fit.qmsg | 26370 | 2017-10-10
|
| xsym\db\prev_cmp_xsym.map.qmsg | 9836 | 2017-10-10
|
| xsym\db\prev_cmp_xsym.qmsg | 17474 | 2017-10-10
|
| xsym\db\prev_cmp_xsym.tan.qmsg | 27167 | 2017-10-10
|
| xsym\db\wed.wsf | 2726 | 2017-10-10
|
| xsym\db\xsym.db_info | 138 | 2017-10-16
|
| xsym\db\xsym.eco.cdb | 161 | 2017-10-16
|
| xsym\db\xsym.sim_ori.vwf | 7140 | 2017-10-10
|
| xsym\db\xsym.sld_design_entry.sci | 197 | 2017-12-12
|
| xsym\xsym.asm.rpt | 7119 | 2017-10-10
|
| xsym\xsym.done | 26 | 2017-10-10
|
| xsym\xsym.fit.rpt | 159382 | 2017-10-10
|
| xsym\xsym.fit.smsg | 499 | 2017-10-10
|
| xsym\xsym.fit.summary | 587 | 2017-10-10
|
| xsym\xsym.flow.rpt | 6263 | 2017-10-10
|
| xsym\xsym.map.rpt | 20614 | 2017-10-10
|
| xsym\xsym.map.summary | 448 | 2017-10-10
|
| xsym\xsym.pin | 58326 | 2017-10-10
|
| xsym\xsym.pof | 2097294 | 2017-10-10
|
| xsym\xsym.qpf | 907 | 2017-10-10
|
| xsym\xsym.qsf | 2212 | 2017-12-12
|
| xsym\xsym.qws | 528 | 2017-10-16
|
| xsym\xsym.sim.rpt | 111030 | 2017-10-10
|
| xsym\xsym.sof | 525330 | 2017-10-10
|
| xsym\xsym.tan.rpt | 26997 | 2017-10-10
|
| xsym\xsym.tan.summary | 1172 | 2017-10-10
|
| xsym\xsym.v | 548 | 2017-10-13
|
| xsym\xsym.v.bak | 449 | 2017-10-10
|
| xsym\xsym.vwf | 7918 | 2017-10-10
|
| xsym\xsym_assignment_defaults.qdf | 48697 | 2017-10-13 |
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