- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 9kb
- Update:
- 2017-07-07
- Downloads:
- 0 Times
- Uploaded by:
- 彭 昊
Description: 3 way input, 8 way output decoder, using FPGA, BASYS3 board to achieve the function, the document already has source code, simulation code and constraint files.
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