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Title: ex8_232 Download
 Description: Uart module is used to communite with PC in the way of spontaneous collection, including buad setting and transceiver. Upper computer is serial debugging assistant.
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File list (Check if you may need any files):
uartverilog
uartverilog\c5_pin_model_dump.txt
uartverilog\db
uartverilog\db\.cmp.kpt
uartverilog\db\my_uart_top.ace_cmp.bpm
uartverilog\db\my_uart_top.ace_cmp.cdb
uartverilog\db\my_uart_top.ace_cmp.hdb
uartverilog\db\my_uart_top.asm.qmsg
uartverilog\db\my_uart_top.asm.rdb
uartverilog\db\my_uart_top.atom_fit.nvd
uartverilog\db\my_uart_top.atom_map.nvd
uartverilog\db\my_uart_top.cbx.xml
uartverilog\db\my_uart_top.cmp.bpm
uartverilog\db\my_uart_top.cmp.cdb
uartverilog\db\my_uart_top.cmp.hdb
uartverilog\db\my_uart_top.cmp.idb
uartverilog\db\my_uart_top.cmp.logdb
uartverilog\db\my_uart_top.cmp.rdb
uartverilog\db\my_uart_top.cmp_merge.kpt
uartverilog\db\my_uart_top.cyclonev_io_sim_cache.ff_0c_fast.hsd
uartverilog\db\my_uart_top.cyclonev_io_sim_cache.ff_85c_fast.hsd
uartverilog\db\my_uart_top.cyclonev_io_sim_cache.tt_0c_slow.hsd
uartverilog\db\my_uart_top.cyclonev_io_sim_cache.tt_85c_slow.hsd
uartverilog\db\my_uart_top.db_info
uartverilog\db\my_uart_top.eco.cdb
uartverilog\db\my_uart_top.eda.qmsg
uartverilog\db\my_uart_top.fit.qmsg
uartverilog\db\my_uart_top.hier_info
uartverilog\db\my_uart_top.hif
uartverilog\db\my_uart_top.logic_util_heuristic.dat
uartverilog\db\my_uart_top.lpc.html
uartverilog\db\my_uart_top.lpc.rdb
uartverilog\db\my_uart_top.lpc.txt
uartverilog\db\my_uart_top.map.ammdb
uartverilog\db\my_uart_top.map.bpm
uartverilog\db\my_uart_top.map.cdb
uartverilog\db\my_uart_top.map.hdb
uartverilog\db\my_uart_top.map.kpt
uartverilog\db\my_uart_top.map.logdb
uartverilog\db\my_uart_top.map.qmsg
uartverilog\db\my_uart_top.map.rdb
uartverilog\db\my_uart_top.map_bb.cdb
uartverilog\db\my_uart_top.map_bb.hdb
uartverilog\db\my_uart_top.map_bb.logdb
uartverilog\db\my_uart_top.npp.qmsg
uartverilog\db\my_uart_top.pplq.rdb
uartverilog\db\my_uart_top.pre_map.hdb
uartverilog\db\my_uart_top.pti_db_list.ddb
uartverilog\db\my_uart_top.root_partition.map.reg_db.cdb
uartverilog\db\my_uart_top.routing.rdb
uartverilog\db\my_uart_top.rtlv.hdb
uartverilog\db\my_uart_top.rtlv_sg.cdb
uartverilog\db\my_uart_top.rtlv_sg_swap.cdb
uartverilog\db\my_uart_top.sgate.nvd
uartverilog\db\my_uart_top.sgate_sm.nvd
uartverilog\db\my_uart_top.sld_design_entry.sci
uartverilog\db\my_uart_top.sld_design_entry_dsc.sci
uartverilog\db\my_uart_top.smart_action.txt
uartverilog\db\my_uart_top.sta.qmsg
uartverilog\db\my_uart_top.sta.rdb
uartverilog\db\my_uart_top.sta_cmp.6_slow_1100mv_85c.tdb
uartverilog\db\my_uart_top.tis_db_list.ddb
uartverilog\db\my_uart_top.tiscmp.fast_1100mv_0c.ddb
uartverilog\db\my_uart_top.tiscmp.fast_1100mv_85c.ddb
uartverilog\db\my_uart_top.tiscmp.slow_1100mv_0c.ddb
uartverilog\db\my_uart_top.tiscmp.slow_1100mv_85c.ddb
uartverilog\db\my_uart_top.tmw_info
uartverilog\db\my_uart_top.vpr.ammdb
uartverilog\db\prev_cmp_my_uart_top.asm.qmsg
uartverilog\db\prev_cmp_my_uart_top.fit.qmsg
uartverilog\db\prev_cmp_my_uart_top.map.qmsg
uartverilog\db\prev_cmp_my_uart_top.qmsg
uartverilog\db\prev_cmp_my_uart_top.tan.qmsg
uartverilog\incremental_db
uartverilog\incremental_db\compiled_partitions
uartverilog\incremental_db\compiled_partitions\my_uart_top.db_info
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.cmp.ammdb
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.cmp.cdb
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.cmp.dfp
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.cmp.hbdb.cdb
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.cmp.hbdb.hdb
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.cmp.hbdb.sig
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.cmp.hdb
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.cmp.logdb
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.cmp.rcfdb
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.map.cdb
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.map.dpi
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.map.hbdb.cdb
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.map.hbdb.hb_info
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.map.hbdb.hdb
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.map.hbdb.sig
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.map.hdb
uartverilog\incremental_db\compiled_partitions\my_uart_top.root_partition.map.kpt
uartverilog\incremental_db\compiled_partitions\my_uart_top.rrp.hdb
uartverilog\incremental_db\compiled_partitions\my_uart_top.rrs.cdb
uartverilog\incremental_db\README
uartverilog\my_uart_rx.v
uartverilog\my_uart_rx.v.bak
uartverilog\my_uart_top.asm.rpt
uartverilog\my_uart_top.cdf

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