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Title: lab4 Download
 Description: Verilog lab4 is used for learning vivado
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File list (Check if you may need any files):
clk_div.v
clk_gen.v
clkx_bus.v
clogb2.txt
cmd_parse.v
dac_spi.v
debouncer.v
lb_ctl.v
meta_harden.v
out_ddr_flop.v
reset_bridge.v
resp_gen.v
rst_gen.v
samp_gen.v
samp_ram.v
testpattern.txt
to_bcd.v
uart_baud_gen.v
uart_rx.v
uart_rx_ctl.v
uart_tx.v
uart_tx_ctl.v
wave_gen.v
wave_gen_pins_basys3.xdc
wave_gen_pins_nexys4.xdc
wave_gen_timing.xdc

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