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Title: C5G_LPDDR2_RTL_Test Download
 Description: LPDDR2 project, alteral's C5 chip, has been verified on board and can be directly used.
 Downloaders recently: [More information of uploader 橙子很好吃]
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File list (Check if you may need any files): 
FilenameSizeDate
C5G_LPDDR2_RTL_Test 0  2018-04-03

C5G_LPDDR2_RTL_Test\Avalon_bus_RW_Test.v 4991  2014-06-24

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.cdf 332  2018-04-03

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.done 26  2014-06-24

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.fit.smsg 1028  2013-08-08

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.fit.summary 723  2014-06-24

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.jdi 4901  2014-06-24

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.map.smsg 3328  2014-05-15

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.map.summary 547  2014-06-24

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.pin 79475  2014-06-23

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.pti_db_list.ddb 296  2014-05-20

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.qpf 118  2013-08-07

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.qsf 109085  2018-04-03

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.qws 367  2018-04-03

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.sdc 3650  2014-06-24

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.sof 4001404  2014-06-24

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.sta.summary 15485  2014-06-24

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.tis_db_list.ddb 296  2014-05-20

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test.v 12549  2014-06-23

C5G_LPDDR2_RTL_Test\C5G_LPDDR2_RTL_Test_assignment_defaults.qdf 47533  2014-05-15

C5G_LPDDR2_RTL_Test\c5_pin_model_dump.txt 3697  2013-08-07

C5G_LPDDR2_RTL_Test\db 0  2018-04-03

C5G_LPDDR2_RTL_Test\db\C5G_LPDDR2_RTL_Test.db_info 144  2018-04-03

C5G_LPDDR2_RTL_Test\db\C5G_LPDDR2_RTL_Test.sld_design_entry.sci 1474  2018-04-03

C5G_LPDDR2_RTL_Test\db\stp1_auto_stripped.stp 175076  2018-04-03

C5G_LPDDR2_RTL_Test\demo_batch 0  2018-04-03

C5G_LPDDR2_RTL_Test\demo_batch\C5G_LPDDR2_RTL_Test.bat 433  2013-08-07

C5G_LPDDR2_RTL_Test\demo_batch\C5G_LPDDR2_RTL_Test.sof 4001404  2014-06-24

C5G_LPDDR2_RTL_Test\fpga_lpddr2 0  2018-04-03

C5G_LPDDR2_RTL_Test\fpga_lpddr2.bsf 19168  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2.cmp 4723  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2.ppf 3333  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2.qip 15391  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2.sip 12914  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2.spd 9475  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2.v 32186  2014-06-23

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altdq_dqs2_acv_connect_to_hard_phy_cyclonev_lpddr2.sv 59666  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_avalon_mm_bridge.v 11619  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_avalon_sc_fifo.v 34467  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_avalon_st_pipeline_base.v 4705  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_mem_if_dll_cyclonev.sv 2631  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_mem_if_hard_memory_controller_top_cyclonev.sv 184870  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_mem_if_oct_cyclonev.sv 3030  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_mem_if_sequencer_cpu_cv_synth_cpu_inst.v 85354  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_mem_if_sequencer_cpu_cv_synth_cpu_inst_test_bench.v 32957  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_mem_if_sequencer_mem_no_ifdef_params.sv 2997  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_mem_if_sequencer_rst.sv 3274  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_mem_if_simple_avalon_mm_bridge.sv 4129  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_merlin_arbitrator.sv 9530  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_merlin_burst_uncompressor.sv 13480  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_merlin_master_agent.sv 12421  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_merlin_master_translator.sv 21304  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_merlin_reorder_memory.sv 11344  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_merlin_slave_agent.sv 28311  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_merlin_slave_translator.sv 17186  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\altera_merlin_traffic_limiter.sv 38700  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_0002.v 80764  2014-06-23

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0.ppf 106363  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0.sdc 33727  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0.sv 16538  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_acv_hard_addr_cmd_pads.v 9571  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_acv_hard_io_pads.v 11721  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_acv_hard_memphy.v 29231  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_acv_ldc.v 3535  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_altdqdqs.v 7118  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_clock_pair_generator.v 4097  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_generic_ddio.v 2405  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_iss_probe.v 1803  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_parameters.tcl 4384  2014-06-23

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_phy_csr.sv 5469  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_pin_assignments.tcl 12632  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_pin_map.tcl 93922  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_report_timing.tcl 17668  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_report_timing_core.tcl 82055  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_reset.v 4570  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_reset_sync.v 1997  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_p0_timing.tcl 5284  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_pll0.sv 15221  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0.v 41601  2014-06-23

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_AC_ROM.hex 853  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_addr_router.sv 8465  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_addr_router_001.sv 7585  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_addr_router_002.sv 7961  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_addr_router_003.sv 7961  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_cmd_xbar_demux.sv 5386  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_cmd_xbar_demux_001.sv 3533  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_cmd_xbar_demux_002.sv 4165  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_cmd_xbar_demux_003.sv 4136  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_cmd_xbar_mux.sv 12083  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_id_router.sv 7550  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_id_router_002.sv 7562  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_id_router_003.sv 7479  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_id_router_004.sv 7479  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_inst_ROM.hex 2445  2013-08-07

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_irq_mapper.sv 1693  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_make_qsys_seq.tcl 4654  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_mm_interconnect_0.v 224630  2014-06-23

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_mm_interconnect_0_addr_router.sv 8703  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_mm_interconnect_0_addr_router_001.sv 7707  2014-05-15

C5G_LPDDR2_RTL_Test\fpga_lpddr2\fpga_lpddr2_s0_mm_interconnect_0_addr_router_002.sv 8199  2014-05-15

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