Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: digital_clock Download
 Description: A digital clock module written by Verilog HDL, including timing function, debugging and downloading through Maxplusii.
 Downloaders recently: [More information of uploader IT熊出没]
 To Search:
File list (Check if you may need any files): 
FilenameSizeDate
clk_gen.v 790  2005-11-05

count6.v 532  2005-11-07

count10.v 537  2005-11-07

pp2.v 165  2005-11-05

top.v 3723  2005-11-07

top_tf.v 2068  2005-11-05

top.scf 27270  2005-11-05

CodeBus www.codebus.net