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Title:
USB 1.1 IP-CORE和设计范例 VHDL源代码
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Category:
VHDL-FPGA-Verilog
Tags:
File Size:
416.29kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
gaonet
Description:
Sample program for USB1.1 IP core design, VHDL source code
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