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Title: yolov2_xilinx_fpga-master Download
 Description: A demo for accelerating YOLOv2 in xilinx's fpga PYNQ
 Downloaders recently: [More information of uploader 明月心447]
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FilenameSizeDate
yolov2_xilinx_fpga-master 0 2018-11-29
yolov2_xilinx_fpga-master\LICENSE 1067 2018-11-29
yolov2_xilinx_fpga-master\README.md 5713 2018-11-29
yolov2_xilinx_fpga-master\hls 0 2018-11-29
yolov2_xilinx_fpga-master\hls\README.md 404 2018-11-29
yolov2_xilinx_fpga-master\hls\cat.jpg 140391 2018-11-29
yolov2_xilinx_fpga-master\hls\cnn.cpp 26202 2018-11-29
yolov2_xilinx_fpga-master\hls\cnn.h 909 2018-11-29
yolov2_xilinx_fpga-master\hls\coco.names 625 2018-11-29
yolov2_xilinx_fpga-master\hls\dog.jpg 163759 2018-11-29
yolov2_xilinx_fpga-master\hls\kite.jpg 1415684 2018-11-29
yolov2_xilinx_fpga-master\hls\labels 0 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\100_0.png 320 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\100_1.png 377 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\100_2.png 451 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\100_3.png 508 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\100_4.png 577 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\100_5.png 631 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\100_6.png 697 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\100_7.png 753 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\101_0.png 321 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\101_1.png 388 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\101_2.png 458 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\101_3.png 514 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\101_4.png 581 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\101_5.png 654 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\101_6.png 726 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\101_7.png 804 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\102_0.png 305 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\102_1.png 340 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\102_2.png 354 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\102_3.png 371 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\102_4.png 398 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\102_5.png 411 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\102_6.png 422 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\102_7.png 442 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\103_0.png 333 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\103_1.png 415 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\103_2.png 521 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\103_3.png 586 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\103_4.png 687 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\103_5.png 781 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\103_6.png 858 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\103_7.png 971 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\104_0.png 315 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\104_1.png 345 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\104_2.png 382 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\104_3.png 412 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\104_4.png 439 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\104_5.png 476 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\104_6.png 511 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\104_7.png 542 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\105_0.png 296 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\105_1.png 306 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\105_2.png 318 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\105_3.png 336 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\105_4.png 352 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\105_5.png 360 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\105_6.png 379 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\105_7.png 391 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\106_0.png 293 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\106_1.png 307 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\106_2.png 319 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\106_3.png 335 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\106_4.png 348 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\106_5.png 363 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\106_6.png 374 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\106_7.png 390 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\107_0.png 314 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\107_1.png 358 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\107_2.png 410 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\107_3.png 446 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\107_4.png 490 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\107_5.png 526 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\107_6.png 581 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\107_7.png 609 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\108_0.png 285 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\108_1.png 288 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\108_2.png 296 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\108_3.png 298 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\108_4.png 298 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\108_5.png 300 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\108_6.png 302 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\108_7.png 305 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\109_0.png 321 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\109_1.png 371 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\109_2.png 426 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\109_3.png 475 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\109_4.png 528 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\109_5.png 587 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\109_6.png 628 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\109_7.png 694 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\110_0.png 312 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\110_1.png 341 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\110_2.png 378 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\110_3.png 414 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\110_4.png 444 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\110_5.png 479 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\110_6.png 509 2018-11-29
yolov2_xilinx_fpga-master\hls\labels\110_7.png 544 2018-11-29

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