- Category:
- Embeded-SCM Develop
- Tags:
-
- File Size:
- 19kb
- Update:
- 2019-06-18
- Downloads:
- 0 Times
- Uploaded by:
- 壮胆
Description: ZYNQ FPGA XC7Z035 Pure Verilog Configuration AD9361 Based on VIVADO 2016.4 Project
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File list (Check if you may need any files):
| Filename | Size | Date |
|---|
| ad9361_spi_drv.v | 12619 | 2015-06-07
|
| ad9361_spi_if.v | 2117 | 2014-07-17
|
| adaloop.v | 11087 | 2015-11-30
|
| adaloop.xdc | 7911 | 2016-01-28
|
| adf4001_spi.v | 1776 | 2015-01-13
|
| axi_ad9361_dev_if.v | 12493 | 2014-07-18
|
| ad9361_lut.v | 75865 | 2015-01-06 |
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