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[VHDL-FPGA-Verilogthe-design-of-16-bit-cpu

Description: 用vhdl硬件语言设计的16位cpu,上传的压缩包既包含源代码又包含详细的文档说明。-with vhdl hardware design language of the 16 cpu, Upload compressed contains both the source code also contains a detailed document shows.
Platform: | Size: 128000 | Author: 晶晶 | Hits:

[VHDL-FPGA-Verilogalu

Description: 16位RISC CPU的ALU,使用VHDL编写-16-bit RISC CPU
Platform: | Size: 2048 | Author: 李斌 | Hits:

[VHDL-FPGA-VerilogCPU

Description: 简单的16位CPU的VHDL设计 vhdl代码和cpu设计过程-Simple 16-bit CPU design of the VHDL code and VHDL design process cpu
Platform: | Size: 1488896 | Author: kilva | Hits:

[VHDL-FPGA-VerilogMyCPU16

Description: 16位cpu设计VHDL源码,其中包括alu,clock,memory等部分的设计-16 cpu design VHDL source code, including alu, clock, memory and other parts of the design
Platform: | Size: 1089536 | Author: 孙冰 | Hits:

[OS programcpuinfo

Description: 获取cpu信息的源码,vc++实现的, 可以获取16位 和32位的cpu的信息, 而且源码文家独立给出-Cpu access to source information, vc++ Realize, you can access 16-bit and 32-bit cpu information, and independent source text is given
Platform: | Size: 167936 | Author: liyang | Hits:

[OS program16cpu

Description: 实现16位的cpu设计 内容使用verilog hdl实现,具体的实现步骤方法,都已经写到文档里面去了!-To achieve 16-bit design of the contents of the cpu using verilog hdl achieve, the specific methods to achieve these steps have already been written inside the document went to!
Platform: | Size: 440320 | Author: gimel_sh | Hits:

[VHDL-FPGA-Verilogcpu

Description: 16位元浮点数CPU,可作运算,以VHDL编写-16-bit floating point CPU, can be used for computing in order to prepare VHDL
Platform: | Size: 2048 | Author: 朋友 | Hits:

[VHDL-FPGA-Verilogcpu-16-vhdl

Description: 用vhdl语用实现简单的16位cpu功能-Pragmatic use vhdl simple function of 16-bit cpu
Platform: | Size: 95232 | Author: 陈曦 | Hits:

[Windows Developcpu16

Description: 实现一个16位CPU。该CPU使用精减指令集,是一个五段流水线的结构。包括取指令(IF)、读寄存器(RD)、运算器(ALU)、内存读写(MEM)和写回(WB)。-The realization of a 16-bit CPU. Streamline the use of the CPU instruction set is a structure of five lines. Including fetch (IF), register read (RD), arithmetic logic unit (ALU), memory read and write (MEM) and Write Back (WB).
Platform: | Size: 6144 | Author: 周健 | Hits:

[VHDL-FPGA-VerilogCPU

Description: 用VHDL编的简易16位和8位CPU,可完成加减乘法移位等功能,拥有源码和设计文档,资料齐全-Compiled with VHDL simple 16-bit and 8-bit CPU, to be completed by addition and subtraction multiplication shift functions, with source code and design documents, data and complete
Platform: | Size: 1489920 | Author: 雄鹰 | Hits:

[ARM-PowerPC-ColdFire-MIPS16-bit_cpu_design

Description: 详细介绍了如何设计一个简单的16位cpu.其中包含了从最基础的指令系统开始到最复杂的cu控制器的设计思路,方案.最后还介绍了一些有关vhdl语言的用法,并给出了具体的cpu部件的vhdl代码,从而帮助大家更为深刻的学习如何设计一个简单的cpu-Described in detail how to design a simple 16-bit cpu. Which contains the most basic instruction from the beginning to the most complex cu controller design ideas, program. Finally the author describes some of the vhdl language usage, and gives vhdl cpu specific parts of the code to help you more deeply to learn how to design a simple cpu
Platform: | Size: 1051648 | Author: 罗高 | Hits:

[VHDL-FPGA-Verilogcpu

Description: 16位的CPU的VHDL程序~~还有附加的生成波形,可以应用于课程设计中-16-bit CPU, VHDL ~ ~ There are additional procedures for generating waveforms, can be applied to curriculum design
Platform: | Size: 1053696 | Author: liuying | Hits:

[VHDL-FPGA-VerilogCPU

Description: 16位简单cpu用VHDL语言实现。里面有好几个的》-16-bit cpu with a simple VHDL language. There are several of the "
Platform: | Size: 3181568 | Author: pjj | Hits:

[VHDL-FPGA-Verilogcpu

Description: 给定指令系统的处理器设计,指令字长16位,包含10种操作-Given instruction processor design, 16-bit instruction word length, contains 10 kinds of operations
Platform: | Size: 1090560 | Author: 姜健 | Hits:

[VHDL-FPGA-Verilogzxcpu

Description: 用VHDL语言设计了一个含10条指令的RISC处理器。假定主存可以在一个始终周期内完成依次读写操作且和CPU同步,系统使用一个主存单元。处理器指令字长16位,包含8个通用寄存器,1个16位的指令寄存器和一个16位的程序记数器。处理器的地址总线宽度16位。数据总线宽度16位,取指和数据访问均在一跳蝻数据总线。处理器支持包含LDA,STA,MOV,MVI,ADD,SUB,AND,OR,JZ,JMP十条指令。其中仅有LDA和STA是访存指令。-VHDL language design with a RISC processor with 10 instruction. Assume that main memory can be completed in one cycle is always followed and the CPU read and write operations and the synchronization system uses a main memory unit. 16-bit instruction word processor, including 8 general purpose registers, a 16-bit instruction register and a 16-bit program counter. Processor' s address bus width 16 bits. 16-bit data bus width, fetch and data access are in the hop hoppers data bus. Processor support includes LDA, STA, MOV, MVI, ADD, SUB, AND, OR, JZ, JMP ten instructions. LDA and STA is the only one memory access instructions.
Platform: | Size: 1076224 | Author: zhaoshu | Hits:

[VHDL-FPGA-Verilogvhdl-cpu-16-bit

Description: VHDL processsor 32 bit ALU SRF BUS DATA ADRESS C16 System On Chip Architecture
Platform: | Size: 976896 | Author: luis | Hits:

[Software EngineeringSTM8-CPU-programming-manua

Description: STM8指令集。文档是英文说明档案,注意下载哦。 注:不过查了好多资料都没有中文的。-The STM8 family of HCMOS microcontrollers is designed and built around an enhanced industry standard 8-bit core and a library of peripheral blocks, which include ROM, Flash, RAM, EEPROM, I/O, Serial Interfaces (SPI, USART, I2C,...), 16-bit Timers, A/D converters, comparators, power supervisors etc. These blocks may be assembled in various combinations in order to provide cost-effective solutions for application-specific products. The STM8 family forms a part of the STMicroelectronics 8-bit MCU product line, which finds its place in a wide variety of applications such as automotive systems, remote controls, video monitors, car radio and numerous other consumer, industrial, telecom, and multimedia products.
Platform: | Size: 750592 | Author: xuanwuben | Hits:

[Other16-bit-CPU

Description: 单周期16位CPU的设计,我们的计算机组成原理课设,可以实现R型、I型和J型指令,内有报告和指导书-Single-cycle 16-bit CPU design, our Principles of Computer Organization class set, you can achieve R-type, type I, and J-type instructions, reports and instructions
Platform: | Size: 4185088 | Author: 大空翼 | Hits:

[VHDL-FPGA-Verilogcpu

Description: 计算机设计与实践实验 16位cpu设计 使用用VHDL语言 -16-bit cpu design with VHDL
Platform: | Size: 1026048 | Author: yuwentao | Hits:

[VHDL-FPGA-VerilogTEST-CPU-2

Description: 基于VHDL语言的微指令控制的CPU,16位地址线-VHDL language based on the microinstruction control of the CPU, 16-bit address lines
Platform: | Size: 3225600 | Author: Zhiheng Shen | Hits:
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