Search - fpga rs232 code

[VHDL-FPGA-Verilog] generic_fifo

Description: 这是从opencores下的fifo代码,包括了异步和同步的,还有写的testbench,希望对大家有用.-This is opencores fifo under the code, including asynchronous and synchronous. There testbench written in the hope that useful for all.
Platform: | Size: 20480 | Author: daiowen | Hits:

[SCM] stc_rs232

Description: STC单片机读取FPGA筒形寄存器并通过RS232发送到上位机源程序，绝对可用，您可以适当修改满足您的使用，使用Keil c51编写。-STC Single-chip FPGA Barrel register to read through the RS232 sent to the host computer source code is absolutely available, you can modify to meet your proper use, the use of the preparation of Keil c51.
Platform: | Size: 22528 | Author: 吕坤 | Hits:

[VHDL-FPGA-Verilog] rs232

Description: RS232 verilog design
Platform: | Size: 114688 | Author: liuKe | Hits:

[VHDL-FPGA-Verilog] FPGArealizeRS232

Description: 用FPGA实现RS232通信,此代码是用VHDL语言编写，非常有用的好东东啊-RS232 Communication with FPGA realize that this code is written in VHDL, very useful, good东东啊
Platform: | Size: 48128 | Author: 孙建军 | Hits:

[Books] ComunicationRealizationBetweenFPGAandSerialInterfa

Description: 杜晓斌和陈兴文-FPGA和单片机串行通信接口的实现一文提出了FPGA与单片机实现数据串行通信的解决方案。在通信过程中完全遵守RS232 协议，给出了发送模块的vhdl源代码。 -杜晓斌and陈兴文-FPGA single-chip serial communication interface and the realization of a text proposed by the FPGA and MCU serial data communications solutions. In the communication process in full compliance with the RS232 protocol is given to send the VHDL source code modules.
Platform: | Size: 92160 | Author: Wuxinmin | Hits:

[VHDL-FPGA-Verilog] Rs232sourcecode

Description: Working RS232 controller running at 9600 Hz. Consist of Transmitter and Receiver Module. Tested in FPGA Spartan 3 Included files for testing at FPGA - Scan4digit .vhd - to display at 7 sgement display - D4to7 .vhd - Convert HEX decimal to ASCII code. -Working RS232 controller running at 9600 Hz. Consist of Transmitter and Receiver Module. Tested in FPGA Spartan 3 Included files for testing at FPGA - Scan4digit .vhd- to display at 7 sgement display - D4to7 .vhd- Convert HEX decimal to ASCII code.
Platform: | Size: 5120 | Author: Ikki | Hits:

[Com Port] async

Description: 用FPGA实现RS232，代码经过测试通过-FPGA implementation using RS232, the code has been tested through
Platform: | Size: 3072 | Author: treefan.liang | Hits:

[VHDL-FPGA-Verilog] rs232

Description: 完整的RS232 Verilog源代码，支持波特率可调，支持调试命令，配合串口调试工具，可作为FPGA开发中的调试平台。-Full RS232 Verilog source code, support for baud rate is adjustable to support debugging command, with the serial debugging tools can be used as the debugging FPGA development platform.
Platform: | Size: 13312 | Author: 弘历 | Hits:

[VHDL-FPGA-Verilog] 8051Core_RS232

Description: 包含了8051rs232设计的全部源码，可直接应用于sopc/FPGA设计中。-Contains all the source code 8051rs232 design can be directly applied to sopc/FPGA design.
Platform: | Size: 6845440 | Author: anchor | Hits:

[VHDL-FPGA-Verilog] RS232

Description: EP2C8Q208_Quartus_V8.0 基于FPGA实现RS232 VHDL代码-EP2C8Q208_Quartus_V8.0 FPGA-based implementation RS232 VHDL code
Platform: | Size: 402432 | Author: zkzkzk | Hits:

[VHDL-FPGA-Verilog] my_uart1_VERILOG_using-PLL

Description: Verilog uart example, RS232的Verilog例子。PC 发送一个字节（byte）到板子（FPGA），板子回发一个(byte+1).例子简洁，有注释。用到PLL，而且有3：2次数据采用-Verilog uart example，Verilog RS232 example，it s easy to understand, PC send 1 Byte RS232 code to FPGA, FPGA return 1 tht code，but Byte+1， Using PLL
Platform: | Size: 506880 | Author: 林端 | Hits:

[VHDL-FPGA-Verilog] ps2-RS232

Description: PS2键盘字符码输出，通过FPGA控制，与pc机实现串口通信（RS232）-PS2 keyboard character code output by FPGA control, serial communication with the pc-(RS232)
Platform: | Size: 4769792 | Author: 刘渝 | Hits:

[VHDL-FPGA-Verilog] RS232

Description: 该代码实现了根据RS232协议发送、接收数据的功能。该模块可以移植到任何使用该协议的FPGA。-The code based on RS232 protocol to send and receive data. The module can be ported to any FPGA that uses the protocol.
Platform: | Size: 3072 | Author: 张明 | Hits:

[VHDL-FPGA-Verilog] rs232uart

Description: 利用fpga完成rs232代码，完整程序-Using fpga completed rs232 code
Platform: | Size: 7168 | Author: 陈一姐 | Hits:

[source in ebook] rs232

Description: fpga与pc机的rs232的通信代码，简单全面-the fpga with pc rs232 communication code, simple and comprehensive
Platform: | Size: 5120 | Author: funi | Hits:

[VHDL-FPGA-Verilog] uart_async

Description: RS232串口通信代码，采用verilog HDL实现，在quartus上仿真通过并下载到fpga平台功能验证-RS232 CODE
Platform: | Size: 2048 | Author: 李飞 | Hits:

[VHDL-FPGA-Verilog] RS232

Description: this code show how to use Altium to coding RS232 on FPGA-CPLD
Platform: | Size: 175104 | Author: fazel | Hits:

[Software Engineering] FPGA-RS232

Description: FPGA与RS232通讯的代码及资料。内含有：RS232发送代码Verilog；RS232接收代码Verilog；RS232协议详细接收WORD文档，也有仿真图哦-FPGA code and RS232 communications and information. Inside contains: RS232 send code Verilog RS232 receive code Verilog RS232 protocol detailed receive WORD document, there are simulation diagram oh
Platform: | Size: 913408 | Author: 知行合一 | Hits:

[SCM] RS232

Description: UART协议实现Verolog源码，可在FPGA上综合(UART Verolog source code)
Platform: | Size: 2048 | Author: Jurge | Hits:

[VHDL-FPGA-Verilog] RS232

Description: 串口收发代码，可设置速率，工程中已验证可用(Serial transceiver code, can set the rate, the project has been verified to be available)
Platform: | Size: 2048 | Author: 清远怡然 | Hits:

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[VHDL-FPGA-Verilog] generic_fifo

[SCM] stc_rs232

[VHDL-FPGA-Verilog] rs232

[VHDL-FPGA-Verilog] FPGArealizeRS232

[Books] ComunicationRealizationBetweenFPGAandSerialInterfa

[VHDL-FPGA-Verilog] Rs232sourcecode

[Com Port] async

[VHDL-FPGA-Verilog] rs232

[VHDL-FPGA-Verilog] 8051Core_RS232

[VHDL-FPGA-Verilog] RS232

[VHDL-FPGA-Verilog] my_uart1_VERILOG_using-PLL

[VHDL-FPGA-Verilog] ps2-RS232

[VHDL-FPGA-Verilog] RS232

[VHDL-FPGA-Verilog] rs232uart

[source in ebook] rs232

[VHDL-FPGA-Verilog] uart_async

[VHDL-FPGA-Verilog] RS232

[Software Engineering] FPGA-RS232

[SCM] RS232

[VHDL-FPGA-Verilog] RS232

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