Welcome![Sign In][Sign Up]
Location:

List Page 259417

« 1 2 ... .12 .13 .14 .15 .16 259417.18 .19 .20 .21 .22 ... 267486 »

[Communication-MobileCRC 8

Description: cyclic redundancy check
Platform: | Size: 15360 | Author: kesi | Hits:

[Communication-MobileCRC_16

Description: cyclic redudancy check 16 bit
Platform: | Size: 12288 | Author: kesi | Hits:

[Communication-Mobilefifo

Description: First In First Out for fpga
Platform: | Size: 28672 | Author: kesi | Hits:

[Othera

Description: yet another log parser
Platform: | Size: 2048 | Author: yyyxxxzzz | Hits:

[Communication-Mobilemux41

Description: Multiplexer 4 input and 1 output for FPGA
Platform: | Size: 398336 | Author: kesi | Hits:

[VHDL-FPGA-VerilogAES加密算法密码模块

Description: The realization of the AES encryption password module, contains a description of the function modules and test cases, learning difficult to get started
Platform: | Size: 78848 | Author: 未曾走远 | Hits:

[e-language超级http读文件

Description: The *.dll file is automatically injected into the EXE and merged into a file.
Platform: | Size: 11264 | Author: lingxing | Hits:

[Game ProgramOpenGLES

Description: OpenGL ES 2.0 Surface View Classes
Platform: | Size: 36864 | Author: gudhi | Hits:

[OtherJavaFirst

Description: Learning files and you with me pleses
Platform: | Size: 3072 | Author: 天地大同 | Hits:

[OtherScienceDirect_articles_07Aug2017_19-26-09.063

Description: the paper is very important
Platform: | Size: 660480 | Author: huychampi | Hits:

[Otheru_cst_tojson

Description: Powerbuilder To Json
Platform: | Size: 2048 | Author: 张小文 | Hits:

[Algorithmdvv.tar

Description: Nonlinear identification by using delay vector variance
Platform: | Size: 39936 | Author: 李勋 | Hits:
« 1 2 ... .12 .13 .14 .15 .16 259417.18 .19 .20 .21 .22 ... 267486 »

CodeBus www.codebus.net