Hot Search : Source embeded web remote control p2p game More...
Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2012-11-26
  • Size : 3.67mb
  • Downloaded :0次
  • Author :zjl***
  • About : Nobody
  • PS : If download it fails, try it again. Download again for free!
Introduction - If you have any usage issues, please Google them yourself
VHDL language used to achieve digital transmission 2DPSK
Packet file list
(Preview for download)
谭述润04005026杨俊义04005336朱星星04005203
..........................................\数字调制解调器.doc
..........................................\程序
..........................................\....\设计
..........................................\....\....\Creativity
..........................................\....\....\..........\channel_choice.v
..........................................\....\....\..........\clk_div.v
..........................................\....\....\..........\demodulate.v
..........................................\....\....\..........\diff_code.v
..........................................\....\....\..........\diff_code.v.bak
..........................................\....\....\..........\dig_display.v
..........................................\....\....\..........\dig_filter.v
..........................................\....\....\..........\DPSK.v
..........................................\....\....\..........\DPSK_shell.v
..........................................\....\....\..........\DPSK_shell.v.bak
..........................................\....\....\..........\generate_dm.v
..........................................\....\....\..........\generate_dm.vwf
..........................................\....\....\..........\get_edge.v
..........................................\....\....\..........\instantiation_1to4.v
..........................................\....\....\..........\key_buffer.v
..........................................\....\....\..........\lcd.vhd
..........................................\....\....\..........\lcd.vhd.bak
..........................................\....\....\..........\lcdcont.vhd
..........................................\....\....\..........\lcdcont.vhd.bak
..........................................\....\....\..........\LCM.v
..........................................\....\....\..........\LCM_pre.v
..........................................\....\....\..........\LCM_pre.v.bak
..........................................\....\....\..........\modulate.v
..........................................\....\....\..........\my_dff.v
..........................................\....\....\..........\my_shift_reg.v
..........................................\....\....\..........\my_syn_counter.v
..........................................\....\....\..........\my_trigger.v
..........................................\....\....\..........\pass_buffer.v
..........................................\....\....\..........\pass_buffer_8bit.v
..........................................\....\....\..........\phase_counter.v
..........................................\....\....\..........\phase_counter.v.bak
..........................................\....\....\..........\phase_table.v
..........................................\....\....\..........\shift_detect.v
..........................................\....\....\..........\synchronize.v
..........................................\....\....\Document
..........................................\....\....\........\CPLD板端口设计.doc
..........................................\....\....\........\CPLD母版与模拟电路子板的连接协议.doc
..........................................\....\....\........\DPSK数字端集成调试.doc
..........................................\....\....\........\DPSK调制解调器设计.doc
..........................................\....\....\........\DPSK调制解调器设计文档.doc
..........................................\....\....\DPSK
..........................................\....\....\....\Chain1.cdf
..........................................\....\....\....\Chain_DPSK.cdf
..........................................\....\....\....\channel_choice.vwf
..........................................\....\....\....\clk_div.sim.vwf
..........................................\....\....\....\clk_div.vwf
..........................................\....\....\....\cmp_state.ini
..........................................\....\....\....\db
..........................................\....\....\....\..\.cbx.xml
..........................................\....\....\....\..\ad
Related instructions
  • We are an exchange download platform that only provides communication channels. The downloaded content comes from the internet. Except for download issues, please Google on your own.
  • The downloaded content is provided for members to upload. If it unintentionally infringes on your copyright, please contact us.
  • Please use Winrar for decompression tools
  • If download fail, Try it againg or Feedback to us.
  • If downloaded content did not match the introduction, Feedback to us,Confirm and will be refund.
  • Before downloading, you can inquire through the uploaded person information

Nothing.

Post Comment
*Quick comment Recommend Not bad Password Unclear description Not source
Lost files Unable to decompress Bad
*Content :
*Captcha :
CodeBus is the largest source code store in internet!
Contact us :
1999-2046 CodeBus All Rights Reserved.