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decoder_2_10

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2012-11-26
  • Size : 1.71mb
  • Downloaded :0次
  • Author :画***
  • About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
Using VHDL languages II- Decimal encoder, in MAX+ Plus software to achieve, including the demo screenshot.
Packet file list
(Preview for download)
decoder_2_10
............\1.bmp
............\1.doc

............\2.bmp

............\3.bmp
............\3.jpg
............\4.bmp
............\4.jpg
............\5.bmp
............\5.jpg
............\6.bmp
............\6.jpg
............\7.bmp
............\7.jpg
............\bmq.vhd
............\decoder_2_10
............\............\bmp.acf
............\............\bmp.hif
............\............\bmq.acf
............\............\bmq.fit
............\............\bmq.hex
............\............\bmq.hif
............\............\bmq.mmf
............\............\bmq.ndb
............\............\bmq.pin
............\............\bmq.pof
............\............\bmq.rpt
............\............\bmq.scf
............\............\bmq.snf
............\............\bmq.sof
............\............\BMQ.sym
............\............\bmq.ttf
............\............\bmq.vhd
............\............\LIB.DLS
............\............\U5755340.DLS
............\............\U5799232.DLS
............\............\U6954597.DLS
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