VHDL-FPGA-Verilog List Page 3343

VHDL-FPGA-Verilog list

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Design_and_Analysis_of_Electronic_Code_Lock Downloaded：0: Design and Analysis of Electronic Code Lock
Update : 2025-03-19 Size : 864kb Publisher : 钱阔
digitalsystemdesign Downloaded：0: FPGA designs are very classic PPT, Beihang XIA Yu-Wen teacher handouts
Update : 2025-03-19 Size : 1.02mb Publisher : 张鹏
ethernet_tri_mode.tar Downloaded：0: Ethernet-based incentive program write verilog source code
Update : 2025-03-19 Size : 670kb Publisher : 张鹏
freedev_i2c Downloaded：0: Prepared based on the Verilog source code for the sub-frequency circuits
Update : 2025-03-19 Size : 34kb Publisher : 张鹏
123 Downloaded：0: easy
Update : 2025-03-19 Size : 261kb Publisher : XC
VHDLxl Downloaded：0: easy
Update : 2025-03-19 Size : 32kb Publisher : XC
1 Downloaded：0: part1
Update : 2025-03-19 Size : 533kb Publisher : XC
2 Downloaded：0: part2
Update : 2025-03-19 Size : 466kb Publisher : XC
3 Downloaded：0: part3
Update : 2025-03-19 Size : 541kb Publisher : XC
SZZ Downloaded：0: This is a digital clock in VHDL language, with a tune, the tone seconds and sub-transfer function, while the system also has 12 hours to 24 hours the system switching function
Update : 2025-03-19 Size : 832kb Publisher : 蔡斌
renyimo Downloaded：0: This is a work written in VHDL counter, is an arbitrary module of the counter, but is an asynchronous
Update : 2025-03-19 Size : 3kb Publisher : 蔡斌
jtd Downloaded：0: It is written in VHDL, a traffic light controller that can control the main roads and rural roads at the traffic lights
Update : 2025-03-19 Size : 284kb Publisher : 蔡斌

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