VHDL-FPGA-Verilog List Page 3422

VHDL-FPGA-Verilog list

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DE2_EP2C35 Downloaded：0: EP2C35 official development board schematics, is altera of official information. Fpga circuit design is a good reference model.
Update : 2025-03-16 Size : 343kb Publisher : ami
motor Downloaded：0: verilog motor control
Update : 2025-03-16 Size : 1019kb Publisher : zhx
ad0809 Downloaded：0: verilog_ad0809 cpld control
Update : 2025-03-16 Size : 142kb Publisher : zhx
da0832 Downloaded：0: verilog da0832 cpld\fpga control
Update : 2025-03-16 Size : 165kb Publisher : zhx
led_horse Downloaded：0: led_horse vhdl cpld\fpga
Update : 2025-03-16 Size : 1.25mb Publisher : zhx
key Downloaded：0: du to fpga 4*4 keyscan verilog
Update : 2025-03-16 Size : 1kb Publisher : fds
IIC_slave_code Downloaded：0: about I2C slave code about I2C slave code
Update : 2025-03-16 Size : 181kb Publisher : qinjuanyan
s3ansk_paint Downloaded：0: Paint for SPARTAN 3E
Update : 2025-03-16 Size : 846kb Publisher : atcam
ActivePowerMeter Downloaded：0: Spartan 3e- Active Power Meter
Update : 2025-03-16 Size : 55kb Publisher : atcam
key Downloaded：0: Written in Verilog HDL keyboard scanner, taking into account to determine key bounce problem. Program according to a certain frequency of scan lines with low-level circulation lines, while testing out the state line, onc
Update : 2025-03-16 Size : 2.1mb Publisher : 力文
ddfsdemo Downloaded：0: Direct Digital Frequency Synthesizer ( DDFS) of the VHDL program, the development environment is QuartusII, the system clock to 50MHz, the work of DDFS generated by PLL clock 166.67MHz, address bit-width of 24-bit freque
Update : 2025-03-16 Size : 632kb Publisher : 力文
clock_digital Downloaded：0: Written by Verlog HDL ，a digital clock program, including hours, minutes, seconds, into the place, decoding, scanning display.
Update : 2025-03-16 Size : 1008kb Publisher : 吴海燕

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