VHDL-FPGA-Verilog List Page 3537

VHDL-FPGA-Verilog list

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CRC Downloaded：0: Communication systems on the circle of error detection of vhdl simulation program, very complete
Update : 2025-03-11 Size : 220kb Publisher : fengyun
elevator Downloaded：0: This is a small curriculum design, on the elevator control of vhdl simulation program, very complete
Update : 2025-03-11 Size : 279kb Publisher : fengyun
wave_generator Downloaded：0: This is a signal generator on the vhdl simulation program, very complete
Update : 2025-03-11 Size : 295kb Publisher : fengyun
suanfa Downloaded：0: Algorithm for hardware implementation, learning good information, hear from teachers BUAA Xia, VERILOG.
Update : 2025-03-11 Size : 190kb Publisher : LX
THS1206 Downloaded：0: FPGA to realize data acquisition, AD using TI company s THS1206, high-speed parallel AD, containing the 16-character FIFO, to reduce hardware complexity.
Update : 2025-03-11 Size : 1kb Publisher : LX
tlc549 Downloaded：0: The realization of digital voltage meter, VHDL language, AD using TLC549, by learning to understand the acquisition process AD
Update : 2025-03-11 Size : 2kb Publisher : LX
dac Downloaded：0: 0 ~ 5 V digital voltage source adjustable to 5 V for the voltage reference, digital tube displays the current voltage value, the use of VHDL language, the program notes are added to facilitate reading.
Update : 2025-03-11 Size : 1kb Publisher : LX
eff1 Downloaded：0: Marquee achieved using Verilog, from one end of tube to the other end of the cycle. Other similar expressions of such basic, like the cycle.
Update : 2025-03-11 Size : 1kb Publisher : Chao
FPQ Downloaded：0: FPGA-based digital frequency divider, a clock signal can now be divided into different frequency clock signals.
Update : 2025-03-11 Size : 3kb Publisher : 静
sin Downloaded：0: FPGA-based sine wave generator, can produce different frequency sine wave.
Update : 2025-03-11 Size : 595kb Publisher : 静
Shuma Downloaded：0: Complete procedures for the electronic bell, including the time, from time to time, to make the function table, which contains 24 hexadecimal, 60 hexadecimal counter design, and top-level document
Update : 2025-03-11 Size : 887kb Publisher : 李坤鹏
rloc Downloaded：0: Example files for the applicantion of RLOC in Xilinx device.
Update : 2025-03-11 Size : 5kb Publisher : xiang

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