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VHDL-FPGA-Verilog list
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key_scan
Downloaded:0
verilog keyboard scanning, digital tube display program, there is no increase in consumer Buffeting
Update
: 2025-01-31
Size
: 1kb
Publisher
:
robin
4_31
Downloaded:0
This is an interleaver/de-interleaver to achieve the FPGA, although the function of interleaver simple, but its more complicated to achieve
Update
: 2025-01-31
Size
: 815kb
Publisher
:
谢建伟
DA_fir
Downloaded:0
Distributed algorithm based on FIR filter design and FPGA realization of
Update
: 2025-01-31
Size
: 4.5mb
Publisher
:
玉玲
FPGA_FIR_filter
Downloaded:0
FPGA-based FIR filter design
Update
: 2025-01-31
Size
: 384kb
Publisher
:
玉玲
downloadcdmd000
Downloaded:0
National University of Defense Technology of outstanding papers, the digital filter based on FPGA technology research
Update
: 2025-01-31
Size
: 1.71mb
Publisher
:
玉玲
fpga_FILTER
Downloaded:0
FPGA-based programmable digital filter system, the digital filter based on FPGA Design and Implementation, Distributed Pipelined FPGA-based FIR filter algorithm to achieve
Update
: 2025-01-31
Size
: 2.32mb
Publisher
:
玉玲
DES
Downloaded:0
DES algorithm can be useful to achieve the desired FPGA
Update
: 2025-01-31
Size
: 390kb
Publisher
:
house2
gencontrol
Downloaded:0
hign-speed wfgenerator control
Update
: 2025-01-31
Size
: 1kb
Publisher
:
ted yang
verilog
Downloaded:1
Chinese version of Verilog HDL A simple tutorial, very simple, with an example, it is easy to understand for beginners.
Update
: 2025-01-31
Size
: 102kb
Publisher
:
邹仁波
verilog
Downloaded:0
Verilog jpec coder encoder source code
Update
: 2025-01-31
Size
: 277kb
Publisher
:
Martin
115157715conv_code
Downloaded:0
FPGA realization of the function of convolutional codes
Update
: 2025-01-31
Size
: 1kb
Publisher
:
杨玉昆
tlc5510
Downloaded:0
TI' s TLC5510 use the controller to write VHDL and its simulation
Update
: 2025-01-31
Size
: 1.18mb
Publisher
:
yangzhibin
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