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VHDL-FPGA-Verilog list
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decim
Downloaded:0
The Decim cipher documentation can be obtained at http://www.ecrypt.eu.org/stream/decimp3.html
Update
: 2025-01-22
Size
: 2kb
Publisher
:
Verilog
DDC_CIC
Downloaded:0
Using CIC and FIR Filters Design of Digital Down Converter, DSP Builder6.1 version of project file
Update
: 2025-01-22
Size
: 49kb
Publisher
:
达
newvhdl
Downloaded:0
a timer written in VLDL in Quartus II 7.1 platform
Update
: 2025-01-22
Size
: 71kb
Publisher
:
xwl
Verilog_VGA
Downloaded:0
A vga control FPGA code, learning good things.
Update
: 2025-01-22
Size
: 54kb
Publisher
:
sdffer343
beep
Downloaded:0
written in Verilog FPGA speaker control procedures.
Update
: 2025-01-22
Size
: 198kb
Publisher
:
sdffer343
clock
Downloaded:0
designed Clock(minutes and second) by Verilog HDL
Update
: 2025-01-22
Size
: 244kb
Publisher
:
陈阿水
VHDL_da
Downloaded:0
VHDL procedures for a large number of examples for your reference
Update
: 2025-01-22
Size
: 2.84mb
Publisher
:
达
vhdl_cx
Downloaded:0
Dozens of VHDL source code, you can learn from, is the primary programmer of a good helper.
Update
: 2025-01-22
Size
: 228kb
Publisher
:
达
ch5_8
Downloaded:0
Use VHDL to write a 5/8 prescaler, and they hope to study VHDL friends just have to help
Update
: 2025-01-22
Size
: 141kb
Publisher
:
陈阿水
add_eight
Downloaded:0
Use VHDL to write an 8-bit full adder of the experimental procedures
Update
: 2025-01-22
Size
: 58kb
Publisher
:
陈阿水
dec3_8
Downloaded:0
VHDL has written a decoder 38, and pay the simulation waveform.
Update
: 2025-01-22
Size
: 56kb
Publisher
:
陈阿水
REACH
Downloaded:0
VHDL-based asynchronous serial communication circuit design with the advent of electronic technology, field programmable gate array FPGA and CPLD Complex Programmable Logic Device emergence, the designers of electronic s
Update
: 2025-01-22
Size
: 1kb
Publisher
:
chaiyiming
«
1
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.80
.81
.82
.83
.84
3785
.86
.87
.88
.89
.90
...
4311
»
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