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VHDL-FPGA-Verilog list
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vhdl
Downloaded:0
VHDL language design requires a vote 7 and Series detector 1111111101111110
Update
: 2025-03-16
Size
: 1kb
Publisher
:
asd
display_control
Downloaded:0
An LCD controller Verilog source code, can easily control TFT LCD!
Update
: 2025-03-16
Size
: 2kb
Publisher
:
shi
timer
Downloaded:0
To achieve an hour (24 hexadecimal), minutes and seconds (60 hexadecimal) count function function reset function expansion: with the whole point timekeeping tips, regular features such as alarm clock
Update
: 2025-03-16
Size
: 648kb
Publisher
:
doraemon
AUTOLED
Downloaded:0
A total of six taillights, car normal driving, the six light body turn left when the left 3 lights from right to left followed by anti-liang turn right, the right side 3 lights to eliminate light from left to right braki
Update
: 2025-03-16
Size
: 258kb
Publisher
:
doraemon
forVerilog_HDLbeginner
Downloaded:0
Very good entry-level Verilog Tutorial. There are many examples for reference.
Update
: 2025-03-16
Size
: 253kb
Publisher
:
王琳
liftvhdl
Downloaded:0
err
Update
: 2025-03-16
Size
: 9kb
Publisher
:
林姗
I2C
Downloaded:0
Based on the I2C bus master FPGA Design and Implementation
Update
: 2025-03-16
Size
: 1kb
Publisher
:
wang
THXS3EI-I_student_final
Downloaded:0
tinghua FPGA ziliao
Update
: 2025-03-16
Size
: 443kb
Publisher
:
jasper lee
top
Downloaded:0
FPGA procedures top.v documents, the main function of DDS signal generator, through the timer can be simple to achieve the output amplitude wuji hopping
Update
: 2025-03-16
Size
: 2kb
Publisher
:
陈剑
spi
Downloaded:0
Verilog hardware description language used to achieve the spi bus protocol
Update
: 2025-03-16
Size
: 1kb
Publisher
:
cuiwenpin
VHDL
Downloaded:0
VHDL (Very High Speed Integrated Circuit) Tutorial! VHDL for beginners to use!
Update
: 2025-03-16
Size
: 15.55mb
Publisher
:
薛超耀
I2C_test
Downloaded:0
FPGA EP2C5Q288C8 I2C original code, test that is used to open OK.
Update
: 2025-03-16
Size
: 812kb
Publisher
:
kenychen
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.34
.35
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.37
.38
3839
.40
.41
.42
.43
.44
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4311
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