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VHDL-FPGA-Verilog list
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mp3_decoder
Downloaded:0
This is a use of VHDL language to achieve the mp3 codec.
Update
: 2025-01-20
Size
: 33kb
Publisher
:
王龙
VHDLtraining
Downloaded:0
This is a good tool to learn VHDL language, all-animated demo
Update
: 2025-01-20
Size
: 3.76mb
Publisher
:
王龙
top_hc164_driver
Downloaded:0
Authenticated counter, attached to the test document, suitable for the learning and use of
Update
: 2025-01-20
Size
: 3kb
Publisher
:
食肉鸟
SimpleBehavioralSRAMModel
Downloaded:0
HC164 digital tube and used to drive LED indicator light, dynamic scanning digital tube is left temporarily use visual display of the characteristics of landscape caused by human visual impression in the landscape after
Update
: 2025-01-20
Size
: 4kb
Publisher
:
食肉鸟
VHDL_display
Downloaded:0
VHDL realization Oscilloscopes- Full documentation and source code, can achieve in the FPGA
Update
: 2025-01-20
Size
: 221kb
Publisher
:
VHDL_example
Downloaded:0
VHDL language, 100 instances for the use of VHDL Beginners
Update
: 2025-01-20
Size
: 313kb
Publisher
:
PicoBlaze_Embedded
Downloaded:0
Authenticated documents, with the test document, very suitable for the learning and use of
Update
: 2025-01-20
Size
: 981kb
Publisher
:
食肉鸟
ref-sdr-sdram-verilog
Downloaded:0
Standard SRD SDRAM controller reference design, altera provide Verilog code, with user manual, we try to exchange some
Update
: 2025-01-20
Size
: 758kb
Publisher
:
费尔德
signalprocess_fft_VHDL
Downloaded:0
VHDL with a fast Fourier transform papers, including the principle of analysis and code, India Mahatma Gandhi Institute of the University of MA, at the same time contains the user manual, so good FFT
Update
: 2025-01-20
Size
: 382kb
Publisher
:
费尔德
100vhdlexample
Downloaded:0
100 on the VHDL example, under the more appropriate reference for beginners. Can usually write their own comparison comparison. Do not point, we all come to a free download Oh
Update
: 2025-01-20
Size
: 228kb
Publisher
:
周亮
Verilog_HDL
Downloaded:0
Verilog HDL Programming Guide, to be designed as an integrated focus on simulation and simulation at the same time also made to describe further. Verilog HdL gave a comprehensive account of lexical, syntax.
Update
: 2025-01-20
Size
: 8.84mb
Publisher
:
李立
DSP
Downloaded:0
From algorithm design to achieve hard-wired logic: complex digital logic system Verilog HDL design techniques and methods, combined with DSP algorithm design verilog HdL introduced.
Update
: 2025-01-20
Size
: 3.08mb
Publisher
:
李立
«
1
2
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.48
.49
.50
.51
.52
3853
.54
.55
.56
.57
.58
...
4311
»
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