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VHDL-FPGA-Verilog list
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x_hdl
Downloaded:0
VHDL2verilog procedures, I believe very helpful to everyone
Update
: 2025-01-19
Size
: 3.84mb
Publisher
:
navy
an_jian_qu_dou_dong
Downloaded:0
Button can be used to jitter circuit applications, the preparation of the use of VHDL
Update
: 2025-01-19
Size
: 164kb
Publisher
:
xjl
alarm_system
Downloaded:0
Electronic alarm: FPGA-based electronic alarm clock design, modular approach
Update
: 2025-01-19
Size
: 2.1mb
Publisher
:
xjl
password_lock
Downloaded:0
Electronic code locks, FPGA-based design, can be set 6 password
Update
: 2025-01-19
Size
: 1.36mb
Publisher
:
xjl
texi_jifei_system
Downloaded:0
FPGA-based billing system of a taxi, using top-down design methodology
Update
: 2025-01-19
Size
: 637kb
Publisher
:
xjl
i2c_Verilog
Downloaded:0
Verilog development I2C interface module, how the need for more detailed information, please refer to website www.opencores.org
Update
: 2025-01-19
Size
: 11kb
Publisher
:
sun
ethernet.tar
Downloaded:0
Ethernet VHDL and Verilog code for everyone to learn
Update
: 2025-01-19
Size
: 913kb
Publisher
:
sunlee
UART
Downloaded:0
The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.
Update
: 2025-01-19
Size
: 1.06mb
Publisher
:
xiao cao
FPGA3.~(6).SchDoc.Zip
Downloaded:0
A demodulator for digital applications, mainly for the application of digital receiver
Update
: 2025-01-19
Size
: 73kb
Publisher
:
李明
Verilog_Example
Downloaded:0
Design and verification Verilog_ examples Hdl classic books, strongly recommend
Update
: 2025-01-19
Size
: 1.79mb
Publisher
:
洪磊
vhdl
Downloaded:0
VHDL language routines Collection. pdf, all the examples, you will not see stealing
Update
: 2025-01-19
Size
: 165kb
Publisher
:
徐进
38d7dd72-eb79-40e9-b362-77110e0ab3b9
Downloaded:0
The octave-based EDA player automatically have a flower design language VHDL design
Update
: 2025-01-19
Size
: 78kb
Publisher
:
刘军
«
1
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.83
.84
.85
.86
.87
3888
.89
.90
.91
.92
.93
...
4311
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