VHDL-FPGA-Verilog List Page 414

VHDL-FPGA-Verilog list

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usb_device_core_latest.tar Downloaded：0: usb device ip core
Update : 2025-01-19 Size : 26kb Publisher : 查马纠西
BreathingLight Downloaded：0: This the platform used in the Quartus verilog language program, its function is to achieve a breathing light
Update : 2025-01-19 Size : 10.33mb Publisher : 张漫漫
fir_ex Downloaded：0: Design of a 14-order FIR filter, the filter coefficients have been given and the verification process, the choice of Altera s devices EP2S60F484C3
Update : 2025-01-19 Size : 3kb Publisher : zh
TX_RX Downloaded：0: FPGA implementation using verilog string and the computer serial port and single-character accurate communication, 9600, FPGA using verilog to achieve serial and single-character strings, and the computer communicate acc
Update : 2025-01-19 Size : 3.31mb Publisher : 冷酷豪迈
veriloghdl-Prog-of-IR Downloaded：0: Use verilogHDL language programming, to 4 x4 keyboard encode and made the infrared remote control signal, is suitable for programmable logic devices of infrared remote control decoding logic design.
Update : 2025-01-19 Size : 127kb Publisher : houjihong
wallace14 Downloaded：0: this is wallace multiplier 14 bit in vhdl code
Update : 2025-01-19 Size : 4kb Publisher : mortadha
vivado_2014-4_2015-2_64bit Downloaded：0: vivado 2014.4-2015.2 64bit license
Update : 2025-01-19 Size : 11.83mb Publisher : wangbo
timer Downloaded：0: Digital stopwatch, key+ digital tube after power digital control start timing, precision 1/10 sec: Press SW2: Reset (after a re-count is cleared) by SW3: Pause Press SW4: continue counting
Update : 2025-01-19 Size : 901kb Publisher : 吴状态
LCD1602 Downloaded：0: Since 1602 is a slow device, according to our display URL to 32 characters of architecture, we designed a FIFO at the top, at the beginning of the work of the characters to be displayed at once on the LCD1602 display is
Update : 2025-01-19 Size : 869kb Publisher : 吴状态
ALU Downloaded：0: This code contains three architech for only entity
Update : 2025-01-19 Size : 346kb Publisher : Hung
Component_instanlations Downloaded：0: This an example for component_instanlations in VHDL languege
Update : 2025-01-19 Size : 78kb Publisher : Hung
Multiplexer Downloaded：0: This a example for Multiplexer. It is wrote in ISE xillin
Update : 2025-01-19 Size : 169kb Publisher : Hung

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