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VHDL-FPGA-Verilog list
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server board controller is contained in the AHDL procedures, including schematic compiler, the use EPM7128 (CPLD).
Update : 2024-12-25 Size : 514kb Publisher : 老罗

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stepper motor control, controllers, motor control VHDL source
Update : 2024-12-25 Size : 1kb Publisher :

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Verilog language used in the preparation of a digital clock procedures, in addition to the basic count, but also with school, an alarm clock
Update : 2024-12-25 Size : 2kb Publisher : 谢树扬

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pic cpu source code. it is writed in the verilog source code. it can work on the 40Mhz high speed.
Update : 2024-12-25 Size : 24kb Publisher : 詹伟业

data selection, half-adder ,3-8 decoder vhd source code. Recent experimental schools content. I want to become members and therefore has made onto for reference.
Update : 2024-12-25 Size : 11kb Publisher : kljd

eight pseudo-random number generator in Verilog document linear-feedback- shift-register
Update : 2024-12-25 Size : 2kb Publisher : 陈正一

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hardware UART Verilog HDL source, that the relevant documents
Update : 2024-12-25 Size : 335kb Publisher : 陈正一

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a simple eight RISC, Verilog HDL code, the type of pic16c57
Update : 2024-12-25 Size : 79kb Publisher : 陈正一

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FIFO first in-first stack, including three subprogram, according to choose
Update : 2024-12-25 Size : 4kb Publisher : 陈正一

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VCS compiled under the pli example, including the functional simulation, and integrated code
Update : 2024-12-25 Size : 4kb Publisher : 陈正一

classic examples of VHDL, with a total of 44! To download as soon as possible
Update : 2024-12-25 Size : 42kb Publisher : 立立

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automatic bell system, the Converter Platform animal, able to plan, a Bell controls.
Update : 2024-12-25 Size : 444kb Publisher : 程成
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