FPGA design USB1.1IP Core, documentation is also inside the

USB1.1 Core
...........\usb1.1_reference.rar
...........\USB_vhdl说明书
...........\..............\usb_xilinx
...........\..............\..........\an-usbSIE.pdf
...........\..............\..........\ds-usbSIE.pdf
...........\..............\..........\ev-usbSIE.zip
...........\usb_xilinx_vhdl
...........\...............\firmware.a51
...........\...............\FIRMWARE.HEX
...........\...............\GPL.txt
...........\...............\SRAM.vhd
...........\...............\TBxsp010.vhd
...........\...............\TBxsp010pak.vhd
...........\...............\usbEP0.vhd
...........\...............\usbTSTPAK.vhd
...........\...............\XSP010.vhd
...........\...............\xspCLK.vhd
...........\...............\xspCORE.vhd
...........\...............\xspFPGA.vhd
...........\...............\xspLED.vhd
...........\...............\xspPHY.vhd
...........\...............\xspUC.vhd
...........\...............\xspUSB.vhd
...........\说明.txt

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