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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
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Introduction - If you have any usage issues, please Google them yourself
Composition Principle big operation- based on the MIPS computing design, containing a detailed design document, including design documentation and user manual, the main program, testing procedures, as well as the design of the diagram and so on. Can be implemented to achieve a basic computing device on the MIPS instruction were related to 17, prepared using Verilog.
Packet file list
(Preview for download)
组成原理大作业--基于MIPS的运算器设计
....................................\create_testfile.exe
....................................\使用手册.pdf
....................................\框图
....................................\....\1bitALU.vsd
....................................\....\1bitALUDetail.vsd
....................................\....\32bitALU.vsd
....................................\....\32bitALUdetail.vsd
....................................\....\8-bit ALU.vsd
....................................\....\div32.vsd
....................................\....\mult.vsd
....................................\....\乘法器流程.vsd
....................................\....\寄存器.vsd
....................................\....\引脚图
....................................\....\......\ALU.vsd
....................................\....\......\slt处理.vsd
....................................\....\......\乘法器.vsd
....................................\....\......\寄存器堆.vsd
....................................\....\......\控制信号.vsd
....................................\....\......\标志位处理.vsd
....................................\....\......\移位寄存器.vsd
....................................\....\......\符号处理.vsd
....................................\....\......\符号扩展.vsd
....................................\....\......\运算器.vsd
....................................\....\......\除法器.vsd
....................................\....\运算器数据通路.vsd
....................................\....\除法器流程.vsd
....................................\源程序
....................................\......\C++程序
....................................\......\.......\create_testfile.rar
....................................\......\.......\shift2.rar
....................................\......\主程序
....................................\......\......\alu.v
....................................\......\......\alu32.v
....................................\......\......\alu8.v
....................................\......\......\alucontrl.v
....................................\......\......\arithmetic.v
....................................\......\......\bitext.v
....................................\......\......\divider32.v
....................................\......\......\flagpro.v
....................................\......\......\mult32.v
....................................\......\......\mux2.v
....................................\......\......\mux2_2.v
....................................\......\......\mux4.v
....................................\......\......\registerfile.v
....................................\......\......\shift2.v
....................................\......\......\signcontrol.v
....................................\......\......\sltcontrol.v
....................................\......\各模块测试文件
....................................\......\..............\test1.v
....................................\......\..............\test8.v
....................................\......\..............\test_alu.v
....................................\......\..............\test_alucontrl.v
....................................\......\..............\test_arithmetic.v
....................................\......\..............\test_bitext.v
....................................\......\..............\test_divider32.v
....................................\......\..............\test_flagpro.v
....................................\......\..............\test_mult32.v
....................................\......\..............\test_reg.v
....................................\......\..............\test_shift.v
....................................\......\..............\test_signcontrol.v
....................................\......\..............\test_sltcontrol.v
....................................\......\指令测试文件
....................................\......\............\test_add.v
....................................\......\............\test_div.v
....................................\......\............\test_logic.v
....................................\...
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