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wave_produce_VHDL

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 10kb
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  • Author :huan*****
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Introduction - If you have any usage issues, please Google them yourself
-- file name: mine4. VHD. -- function: realize the frequency and amplitude controllable output (square wave) of four common waveforms sinusoidal, triangular, serrated, square wave (A, B) The space ratio of A is also controllable. It can store any waveform characteristic data and reproduce the waveform, which can be completed - linear superimposed output of various waveforms. - note: SSS (top three) and SW signal control four common waveforms. The frequency of four waves, The amplitude (reference range A) is adjusted by the up, down, set key and four BCD code reenters and one - the control signal (ss) of the input gear (ss) is completed. (the adjustment range of AMP is 0~ 5V, and the regulating order is 1/51V). The amplitude of the Chinese wave can also be further through u0, d0, the normalized amplitude of the output data (AMP0) (1 / (51 * 255) V). The space ratio of square wave A is adjusted by the key of zu and zp Volume 1 over 64 times T. The system USES internal memory - RAM implements arbitrary input waveform storage, program only - the keyboard type waveform feature parameters are stored in storage, and the Posting is to enter arbitrary wave input (set) and clear (CLR) state - control signal, SSS control the output of storage waveform. P180 for the reserved port, - err
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8.23 波形发生程序.doc
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