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wb_conbus

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2012-11-26
  • Size : 226kb
  • Downloaded :0次
  • Author :磊**
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Introduction - If you have any usage issues, please Google them yourself
wb_conbus design source code, need to download can be
Packet file list
(Preview for download)
wb_conbus
.........\timescale.v
.........\transcript
.........\vsim.wlf
.........\wb_conbus.cr.mti
.........\wb_conbus.mpf
.........\wb_conbusex_top.v
.........\wb_conbusex_top_bench.v
.........\wb_conbus_arb.v
.........\wb_mast_model.v
.........\wb_slv_model.v
.........\work
.........\....\wb_conbusex_top
.........\....\...............\_primary.dat
.........\....\...............\_primary.dbs
.........\....\...............\_primary.vhd
.........\....\wb_conbusex_top_bench
.........\....\.....................\_primary.dat
.........\....\.....................\_primary.dbs
.........\....\.....................\_primary.vhd
.........\....\wb_conbus_arb
.........\....\.............\_primary.dat
.........\....\.............\_primary.dbs
.........\....\.............\_primary.vhd
.........\....\wb_mast
.........\....\.......\_primary.dat
.........\....\.......\_primary.dbs
.........\....\.......\_primary.vhd
.........\....\wb_slv
.........\....\......\_primary.dat
.........\....\......\_primary.dbs
.........\....\......\_primary.vhd
.........\....\_info
.........\....\_opt
.........\....\....\vopt11djrf
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.........\....\....\voptircxni
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.........\....\....\voptyhks7h
.........\....\....\voptysav9a
.........\....\....\_deps
.........\....\_temp
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