Verilog_hdl proficient in language programming examples of program code, based on the Verilog hardware design language of the procedure, the main aspects of digital circuit

Filename	Size	Update
精通verilog hdl语言编程实例程序代码
...................................\DVB-C信道编、解码器.sch
...................................\实例程序代码
...................................\............\fir_gen.v
...................................\............\第15章 常用加法器设计
...................................\............\.....................\carry_chain_adder.v
...................................\............\.....................\carry_skip_adder.v
...................................\............\.....................\ripple_carry_adder.v
...................................\............\第16章 常用乘法器设计
...................................\............\.....................\basic_base2_mul.v
...................................\............\.....................\basic_base2_mul_seq.v
...................................\............\.....................\carry_save_mult.v
...................................\............\.....................\ripple_carry_mult.v
...................................\............\第17章 伽罗华域GF（q）乘法器设计
...................................\............\................................\ff_const_mul.v
...................................\............\................................\ff_mul.v
...................................\............\................................\transcript
...................................\............\第18章 除法器设计
...................................\............\.................\rest_div_int.v
...................................\............\.................\seq_div.v
...................................\............\第19章 积分梳状滤波器(CIC)设计
...................................\............\..............................\cic3_decimator.v
...................................\............\..............................\transcript
...................................\............\第20章 CORDIC数字计算机的设计
...................................\............\.............................\cordic.v
...................................\............\第21章 伪随机序列应用设计
...................................\............\.........................\randomization.v
...................................\............\第22章 异步FIFO设计
...................................\............\...................\async_cmp.v
...................................\............\...................\async_fifo.v
...................................\............\...................\dp_ram.v
...................................\............\...................\rptr_empty.v
...................................\............\...................\wptr_full.v
...................................\............\第23章 RS(204	188)译码器的设计
...................................\............\..............................\BM_KES.v
...................................\............\..............................\CheinSearch.v
...................................\............\..............................\ff_mul.v
...................................\............\..............................\forney.v
...................................\............\..............................\ROM_INV.mif
...................................\............\..............................\rom_inv.v
...................................\............\..............................\rom_power.mif
...................................\............\..............................\rom_power.v
...................................\............\..............................\RS(204	188)译码器说明.txt
...................................\............\..............................\rs_decoder.v
...................................\............\..............................\SyndromeCalc.v

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