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datashow

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 105kb
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  • Author :les****
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Introduction - If you have any usage issues, please Google them yourself
This procedure is a VHDL prepared using digital tube scanning display controller design and implementation of procedures for learning.
Packet file list
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实验4 吕
........\asm_led.asm.rpt
........\asm_led.done
........\asm_led.fit.eqn
........\asm_led.fit.rpt
........\asm_led.fit.summary
........\asm_led.flow.rpt
........\asm_led.map.eqn
........\asm_led.map.rpt
........\asm_led.map.summary
........\asm_led.pin
........\asm_led.pof
........\asm_led.qpf
........\asm_led.qsf
........\asm_led.qws
........\asm_led.tan.rpt
........\asm_led.tan.summary
........\asm_led.vhd
........\db
........\..\asm_led.asm.qmsg
........\..\asm_led.cbx.xml
........\..\asm_led.cmp.cdb
........\..\asm_led.cmp.hdb
........\..\asm_led.cmp.qrpt
........\..\asm_led.cmp.rdb
........\..\asm_led.cmp.tdb
........\..\asm_led.cmp0.ddb
........\..\asm_led.dbp
........\..\asm_led.db_info
........\..\asm_led.eco.cdb
........\..\asm_led.fit.qmsg
........\..\asm_led.hier_info
........\..\asm_led.hif
........\..\asm_led.map.cdb
........\..\asm_led.map.hdb
........\..\asm_led.map.qmsg
........\..\asm_led.pre_map.cdb
........\..\asm_led.pre_map.hdb
........\..\asm_led.psp
........\..\asm_led.rtlv.hdb
........\..\asm_led.rtlv_sg.cdb
........\..\asm_led.rtlv_sg_swap.cdb
........\..\asm_led.sgdiff.cdb
........\..\asm_led.sgdiff.hdb
........\..\asm_led.sld_design_entry.sci
........\..\asm_led.sld_design_entry_dsc.sci
........\..\asm_led.syn_hier_info
........\..\asm_led.tan.qmsg
........\transform.vhd
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