Simulation language VHDL---- Alarm Clock Design

用VHDL语言仿真闹钟设计
......................\使用说明请参看右侧注释====〉〉.txt
......................\闹钟设计
......................\........\cmp_state.ini
......................\........\db
......................\........\..\fq_divider.asm.qmsg
......................\........\..\fq_divider.cbx.xml
......................\........\..\fq_divider.cmp.cdb
......................\........\..\fq_divider.cmp.hdb
......................\........\..\fq_divider.cmp.rdb
......................\........\..\fq_divider.db_info
......................\........\..\fq_divider.eco.cdb
......................\........\..\fq_divider.eds_overflow
......................\........\..\fq_divider.fit.qmsg
......................\........\..\fq_divider.hier_info
......................\........\..\fq_divider.hif
......................\........\..\fq_divider.map.cdb
......................\........\..\fq_divider.map.hdb
......................\........\..\fq_divider.map.qmsg
......................\........\..\fq_divider.pre_map.cdb
......................\........\..\fq_divider.pre_map.hdb
......................\........\..\fq_divider.psp
......................\........\..\fq_divider.rpp.qmsg
......................\........\..\fq_divider.rtlv.hdb
......................\........\..\fq_divider.rtlv_sg.cdb
......................\........\..\fq_divider.rtlv_sg_swap.cdb
......................\........\..\fq_divider.sgate.rvd
......................\........\..\fq_divider.sgdiff.cdb
......................\........\..\fq_divider.sgdiff.hdb
......................\........\..\fq_divider.sim.hdb
......................\........\..\fq_divider.sim.qmsg
......................\........\..\fq_divider.sim.vwf
......................\........\..\fq_divider.sld_design_entry.sci
......................\........\..\fq_divider.sld_design_entry_dsc.sci
......................\........\..\fq_divider.smp_dump.txt
......................\........\..\fq_divider.syn_hier_info
......................\........\..\fq_divider.tan.qmsg
......................\........\..\fq_divider_cmp.qrpt
......................\........\..\fq_divider_sim.qrpt
......................\........\..\time_lock.asm.qmsg
......................\........\..\time_lock.cbx.xml
......................\........\..\time_lock.cmp.cdb
......................\........\..\time_lock.cmp.hdb
......................\........\..\time_lock.cmp.rdb
......................\........\..\time_lock.cmp.tdb
......................\........\..\time_lock.cmp0.ddb
......................\........\..\time_lock.db_info
......................\........\..\time_lock.eco.cdb
......................\........\..\time_lock.eds_overflow
......................\........\..\time_lock.fit.qmsg
......................\........\..\time_lock.hier_info
......................\........\..\time_lock.hif
......................\........\..\time_lock.map.cdb
......................\........\..\time_lock.map.hdb
......................\........\..\time_lock.map.qmsg
......................\........\..\time_lock.pre_map.cdb
......................\........\..\time_lock.pre_map.hdb
......................\........\..\time_lock.psp
......................\........\..\time_lock.rtlv.hdb
......................\........\..\time_lock.rtlv_sg.cdb
......................\........\..\time_lock.rtlv_sg_swap.cdb
......................\........\..\time_lock.sgdiff.cdb
......................\........\..\time_lock.sgdiff.hdb
......................\........\..\time_lock.signalprobe.cdb
......................\........\..\time_lock.sim.hdb
......................\........\..\time_lock.sim.qmsg
......................\........\..\time_lock.sim.rdb
......................\........\..\time_lock.sim.vwf
......................\........\..\time_lock.sld_design_entry.sci
......................\........\..\time_lock.sld_design_entry_dsc.sci
......................\........\..\time_lock.syn_hier_info
......................\........\..\time_lock.tan.qmsg
......................\........\..\time_lock_cmp.qrpt
......................\........\..\time_lock_sim.qrpt
......................\........\fq_divider.asm.rpt

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