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wannianli

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 20kb
  • Downloaded :1次
  • Author :dq***
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Introduction - If you have any usage issues, please Google them yourself
Using VHDL language calendar procedures, can be displayed on the LCD!
Packet file list
(Preview for download)
wannianli
.........\clk_generator.vhd
.........\Clock.vhd
.........\comperator.vhd
.........\Counter.vhd
.........\data_send.vhd
.........\date_counter.vhd
.........\gate_and2.vhd
.........\Hour.vhd
.........\key.vhd
.........\lcd_decoder.vhd
.........\lcd_driver.vhd
.........\Minute.vhd
.........\Second.vhd
.........\ssend.vhd
.........\statemachine.vhd
.........\top_date_clock.ucf
.........\top_date_clock.vhd
.........\wannianli.npl
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