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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 176kb
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  • Author :Pra****
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Introduction - If you have any usage issues, please Google them yourself
vlsi UART referene, use UART0_3
Packet file list
(Preview for download)
UART0_2
.......\automake.log
.......\UART0_3
.......\.......\.recordref
.......\.......\automake.err
.......\.......\automake.log
.......\.......\backup
.......\.......\run_options.txt
.......\.......\stdout.log
.......\.......\syntmp
.......\.......\......\uart_regs.msg
.......\.......\......\uart_regs.plg
.......\.......\timescale.jhd
.......\.......\timescale.v
.......\.......\traplog.tlg
.......\.......\Uart_3.h
.......\.......\Uart_3.ini
.......\.......\uart_3.jid
.......\.......\Uart_3.lci
.......\.......\Uart_3.lct
.......\.......\uart_3.lpf
.......\.......\Uart_3.mt
.......\.......\Uart_3.pt
.......\.......\uart_3.rev
.......\.......\uart_3.rvp
.......\.......\Uart_3.STY
.......\.......\Uart_3.syn
.......\.......\Uart_3.tcl
.......\.......\Uart_3_tcl.ini
.......\.......\uart_debug_if.jhd
.......\.......\uart_debug_if.naf
.......\.......\uart_debug_if.v
.......\.......\uart_defines.jhd
.......\.......\uart_defines.v
.......\.......\uart_receiver.jhd
.......\.......\uart_receiver.naf
.......\.......\uart_receiver.v
.......\.......\uart_regs.cmd
.......\.......\uart_regs.edi
.......\.......\uart_regs.jhd
.......\.......\uart_regs.log
.......\.......\uart_regs.naf
.......\.......\uart_regs.srd
.......\.......\uart_regs.srm
.......\.......\uart_regs.srs
.......\.......\uart_regs.szr
.......\.......\uart_regs.tlg
.......\.......\uart_regs.v
.......\.......\uart_regs.vhm
.......\.......\uart_regs.vm
.......\.......\uart_sync_flops.jhd
.......\.......\uart_sync_flops.naf
.......\.......\uart_sync_flops.v
.......\.......\uart_top.jhd
.......\.......\uart_top.naf
.......\.......\uart_top.v
.......\.......\uart_transmitter.jhd
.......\.......\uart_transmitter.naf
.......\.......\uart_transmitter.v
.......\uart_debug_if.jhd
.......\uart_debug_if.v
.......\uart_receiver.jhd
.......\uart_receiver.v
.......\uart_regs.jhd
.......\uart_regs.v
.......\uart_sync_flops.jhd
.......\uart_sync_flops.v
.......\uart_top.jhd
.......\uart_top.v
.......\uart_transmitter.jhd
.......\uart_transmitter.v
.......\uart_version2.h
.......\uart_version2.ini
.......\uart_version2.jid
.......\uart_version2.lci
.......\uart_version2.lct
.......\uart_version2.lpf
.......\uart_version2.mt
.......\uart_version2.pt
.......\uart_version2.rev
.......\uart_version2.STY
.......\uart_version2.syn
.......\uart_version2.tcl
.......\uart_version2_tcl.ini
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