EP2C5Q208C8 test models for the FPGA' s RAM and whether it is normal, according to prompts, and display each step of the test results

sdram_test
..........\db
..........\..\sdram_test.db_info
..........\..\sdram_test.eco.cdb
..........\..\sdram_test.sld_design_entry.sci
..........\sdram_test.qpf
..........\sdram_test.qsf
..........\sdram_test.qws
..........\sopc_builder_log.txt

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