VHDL CPLD on the development of experimental procedures, through the use of max+ plus run the program, the experimental implementation-related features

EXA01
.....\EXA01
.....\.....\logic_7474.acf
.....\.....\logic_7474.fit
.....\.....\logic_7474.gdf
.....\.....\logic_7474.hex
.....\.....\logic_7474.hif
.....\.....\logic_7474.mmf
.....\.....\logic_7474.ndb
.....\.....\logic_7474.pin
.....\.....\logic_7474.pof
.....\.....\logic_7474.rpt
.....\.....\logic_7474.scf
.....\.....\logic_7474.snf
.....\.....\logic_7474.sof
.....\.....\logic_7474.ttf
.....\.....\logic_encoder.acf
.....\.....\logic_encoder.fit
.....\.....\logic_encoder.gdf
.....\.....\logic_encoder.hex
.....\.....\logic_encoder.hif
.....\.....\logic_encoder.mmf
.....\.....\logic_encoder.ndb
.....\.....\logic_encoder.pin
.....\.....\logic_encoder.pof
.....\.....\logic_encoder.rpt
.....\.....\logic_encoder.scf
.....\.....\logic_encoder.snf
.....\.....\logic_encoder.sof
.....\.....\logic_encoder.ttf
.....\说明.txt

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