Use of language implementation verilogHDL drive LCD programming

lcd_verilog
...........\lcd
...........\...\cmp_state.ini
...........\...\db
...........\...\..\add_sub_3ih.tdf
...........\...\..\add_sub_4ih.tdf
...........\...\..\add_sub_nlh.tdf
...........\...\..\add_sub_olh.tdf
...........\...\..\lcd.asm.qmsg
...........\...\..\lcd.cbx.xml
...........\...\..\lcd.cmp.cdb
...........\...\..\lcd.cmp.hdb
...........\...\..\lcd.cmp.rdb
...........\...\..\lcd.cmp.tdb
...........\...\..\lcd.cmp0.ddb
...........\...\..\lcd.db_info
...........\...\..\lcd.eco.cdb
...........\...\..\lcd.fit.qmsg
...........\...\..\lcd.hier_info
...........\...\..\lcd.hif
...........\...\..\lcd.map.cdb
...........\...\..\lcd.map.hdb
...........\...\..\lcd.map.qmsg
...........\...\..\lcd.pre_map.cdb
...........\...\..\lcd.pre_map.hdb
...........\...\..\lcd.psp
...........\...\..\lcd.rtlv.hdb
...........\...\..\lcd.rtlv_sg.cdb
...........\...\..\lcd.rtlv_sg_swap.cdb
...........\...\..\lcd.sgdiff.cdb
...........\...\..\lcd.sgdiff.hdb
...........\...\..\lcd.sld_design_entry.sci
...........\...\..\lcd.sld_design_entry_dsc.sci
...........\...\..\lcd.smp_dump.txt
...........\...\..\lcd.syn_hier_info
...........\...\..\lcd.tan.qmsg
...........\...\..\lcd_cmp.qrpt
...........\...\lcd.asm.rpt
...........\...\lcd.cdf
...........\...\lcd.done
...........\...\lcd.fit.eqn
...........\...\lcd.fit.rpt
...........\...\lcd.fit.summary
...........\...\lcd.flow.rpt
...........\...\lcd.map.eqn
...........\...\lcd.map.rpt
...........\...\lcd.map.summary
...........\...\lcd.pin
...........\...\lcd.pof
...........\...\lcd.qpf
...........\...\lcd.qsf
...........\...\lcd.qws
...........\...\lcd.sof
...........\...\lcd.tan.rpt
...........\...\lcd.tan.summary
...........\...\lcd.v
...........\...\lcd1.v

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