Realization of UART in FPGA, with UART module control codes.

uartfifo_fifo_generator_v3_2_xst_1_xsd
......................................\blk_mem_gen_v2_2
......................................\................\sub00
......................................\dump.xst
......................................\........\uartfifo_fifo_generator_v3_2_xst_1.prj
......................................\........\......................................\ngx
......................................\........\......................................\...\notopt
......................................\........\......................................\...\opt
......................................\fifo_generator_v3_2
......................................\...................\hdllib.ref
......................................\...................\hdpdeps.ref
......................................\...................\sub00
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