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division

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 28kb
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  • Author :旭***
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The design of non - integer frequency divider is completed by dividing frequency ratio cross - frequency and accumulator frequency division. - Points were staggered method and frequency than the frequency accumulator law to complete the design of a non - integer divider.
Packet file list
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division
........\accumulater.vhd
........\ctrol.vhd
........\div8.vhd
........\div89.vhd
........\div9.vhd
........\division.cr.mti
........\division.mpf
........\division.vhd
........\transcript
........\vsim.wlf
........\wave.do
........\work
........\....\accumulater
........\....\...........\b.asm
........\....\...........\b.dat
........\....\...........\_primary.dat
........\....\ctrol
........\....\.....\behave.asm
........\....\.....\behave.dat
........\....\.....\_primary.dat
........\....\div8
........\....\....\behave.asm
........\....\....\behave.dat
........\....\....\_primary.dat
........\....\div89
........\....\.....\a.asm
........\....\.....\a.dat
........\....\.....\_primary.dat
........\....\div9
........\....\....\behave.asm
........\....\....\behave.dat
........\....\....\_primary.dat
........\....\division
........\....\........\behave.asm
........\....\........\behave.dat
........\....\........\_primary.dat
........\....\_info
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