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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 1.12mb
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  • Author :钟****
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Introduction - If you have any usage issues, please Google them yourself
Sd card FPGA applications such as control, led control, vga audio control
Packet file list
(Preview for download)
C20_SD
......\C20_BGA_SD.asm.rpt
......\C20_BGA_SD.bdf
......\C20_BGA_SD.done
......\C20_BGA_SD.fit.eqn
......\C20_BGA_SD.fit.rpt
......\C20_BGA_SD.fit.summary
......\C20_BGA_SD.flow.rpt
......\C20_BGA_SD.map.eqn
......\C20_BGA_SD.map.rpt
......\C20_BGA_SD.map.summary
......\C20_BGA_SD.pin
......\C20_BGA_SD.pof
......\C20_BGA_SD.qpf
......\C20_BGA_SD.qsf
......\C20_BGA_SD.qws
......\C20_BGA_SD.sof
......\C20_BGA_SD.tan.rpt
......\C20_BGA_SD.tan.summary
......\cpu_0.ocp
......\cpu_0.v
......\cpu_0_jtag_debug_module.v
......\cpu_0_jtag_debug_module_wrapper.v
......\cpu_0_ociram_default_contents.mif
......\cpu_0_test_bench.v
......\db
......\..\C20_BGA_SD.db_info
......\..\C20_BGA_SD.eco.cdb
......\..\C20_BGA_SD.sld_design_entry.sci
......\jtag_uart_0.v
......\Nios.bsf
......\Nios.ptf
......\Nios.ptf.bak
......\Nios.v
......\Nios_generation_script
......\Nios_log.txt
......\Nios_setup_quartus.tcl
......\Nios_sim
......\........\atail-f.pl
......\........\dummy_file
......\........\jtag_uart_0_input_mutex.dat
......\........\jtag_uart_0_input_stream.dat
......\........\jtag_uart_0_output_stream.dat
......\........\uart_0_input_data_mutex.dat
......\........\uart_0_input_data_stream.dat
......\........\uart_0_log_module.txt
......\onchip_memory_0.hex
......\onchip_memory_0.v
......\rf_ram.mif
......\SD_CS.v
......\SD_PWR.v
......\setup.tcl
......\software
......\........\C20_BGA_SD
......\........\..........\.cdtbuild
......\........\..........\.cdtproject
......\........\..........\.project
......\........\..........\application.stf
......\........\..........\avalon_spi.c
......\........\..........\avalon_spi.h
......\........\..........\Debug
......\........\..........\.....\C20_BGA_SD.elf
......\........\..........\.....\generated_app.sh
......\........\..........\.....\makefile
......\........\..........\.....\obj
......\........\..........\.....\...\avalon_spi.d
......\........\..........\.....\...\avalon_spi.o
......\........\..........\.....\...\main.d
......\........\..........\.....\...\main.o
......\........\..........\.....\...\sdcmd.d
......\........\..........\.....\...\sdcmd.o
......\........\..........\.....\...\sdcrc.d
......\........\..........\.....\...\sdcrc.o
......\........\..........\.....\...\sddriver.d
......\........\..........\.....\...\sddriver.o
......\........\..........\.....\...\sdhal.d
......\........\..........\.....\...\sdhal.o
......\........\..........\.....\subdir.mk
......\........\..........\main.c
......\........\..........\sdcmd.c
......\........\..........\sdcmd.h
......\........\..........\sdconfig.h
......\........\..........\sdcrc.c
......\........\..........\sdcrc.h
......\........\..........\sddriver.c
......\........\..........\sddriver.h
......\........\..........\sdhal.c
......\........\..........\sdhal.h
......\........\C20_BGA_SD_syslib
......\........\.................\.cdtbuild
......\........\.................\.cdtproject
......\........\.................\.project
......\........\.................\Debug
......\........\.................\.....\crt0.d
......\........\.................\.....\crt0.o
......\........\.................\.....\libC20_BGA_SD_syslib.a
......\........\.................\.....\makefile
......\........\.................\.....\obj
......\........\.................\.....\...\altera_avalon_jtag_uart.d
......\........\.................\.....\...\altera_avalon_jtag_uart.o
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