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vhdl_programs

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 67kb
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  • Author :Bao *****
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Introduction - If you have any usage issues, please Google them yourself
This is the course for VHDL programming
Packet file list
(Preview for download)
programs
........\book2
........\.....\de2_1.vhd
........\.....\ex_2_3_3_sparse_ram.vhd
........\.....\ex_2_3_3_stack.vhd
........\.....\ex_2_3_4_consolw_IO.vhd
........\.....\ex_p2_15_clock.vhd
........\.....\ex_p2_16.vhd
........\.....\ex_p2_17_parity.vhd
........\.....\ex_p2_18_parity_check.vhd
........\.....\ex_p2_19_adder.vhd
........\.....\ex_p2_20_package.vhd
........\.....\ex_p_2_20_package.vhd
........\book3
........\.....\ex_3_3_1_get_rate.vhd
........\.....\ex_3_3_2_mux_4_1.vhd
........\.....\ex_3_5_1_dff.vhd
........\.....\ex_3_7_4_func_proc.vhd
........\.....\ex_3_8_overload.vhd
........\.....\ex_3_9_2_CRC32.vhd
........\.....\ex_3_9_2_mult8.vhd
........\.....\ex_3_9_2_mult8_tb.vhd
........\.....\ex_P13_is_xz.vhd
........\.....\ex_p3_15_overload.vhd
........\.....\ex_p3_17_divider.vhd
........\.....\ex_p3_18_factorial.vhd
........\.....\ex_p3_19_dff_proc.vhd
........\.....\ex_p3_9_to_16_func_proc.vhd
........\book4
........\.....\ex_4_2_1_mux_cond.vhd
........\.....\ex_4_2_barrel.vhd
........\.....\ex_4_2_decoder.vhd
........\.....\ex_4_2_prio.vhd
........\.....\ex_4_3_decoder.vhd
........\.....\ex_4_3_mux.vhd
........\.....\ex_4_3_prio.vhd
........\.....\ex_4_5_tff.vhd
........\.....\ex_P4_11_look_ahead_add.vhd
........\.....\ex_P4_12_data_splitter.vhd
........\.....\ex_p4_13_BCD_TO_7SEG.vhd
........\.....\ex_p4_14_unishift.vhd
........\.....\ex_p4_15_enb_decoder.vhd
........\.....\ex_p4_16_neg_JKFF.vhd
........\.....\ex_p4_17_two_port_ram.vhd
........\.....\ex_p4_18_hdlc_fsm.vhd
........\.....\ex_p4_19_ALU.vhd
........\.....\ex_p4_20_L0_counter.vhd
........\.....\ex_p4_21_sync_counter.vhd
........\.....\ex_p4_22_dual_seq_fsm.vhd
........\.....\ex_p4_23_cond_examplw.vhd
........\.....\ex_p4_24_switchtail.vhd
........\.....\ex_p4_25_mobius.vhd
........\.....\ex_p4_26_edge_det.vhd
........\.....\ex_p4_27_edge_detect.vhd
........\.....\ex_p4_28_BCD_ADD.vhd
........\.....\ex_p4_28_normalizer.vhd
........\.....\ex_P4_7_sel_ass.vhd
........\.....\ex_P4_8_E3_to_BCD.vhd
........\book5
........\.....\conv_pkg.vhd
........\.....\ex_5_10_libram.vhd
........\.....\ex_5_2_adder.vhd
........\.....\ex_5_6_RAM_8_CHIPS.vhd
........\.....\ex_p5_10_combmult_config.vhd
........\.....\ex_p5_12_parity_n.vhd
........\.....\ex_p5_13_complementer.vhd
........\.....\ex_p5_14_add_sub.vhd
........\.....\ex_p5_15_xor_generic.vhd
........\.....\ex_p5_16_parity.vhd
........\.....\ex_p5_17_dword_adder.vhd
........\.....\ex_p5_18_TFF_cascade.vhd
........\.....\ex_p5_19_fa_nand.vhd
........\.....\ex_p5_21_gen_nand.vhd
........\.....\ex_p5_22_N_squared_parity_gen.vhd
........\.....\ex_p5_23_tff_cntr.vhd
........\.....\ex_p5_25_mult4X4.vhd
........\.....\ex_p5_26_fsm_pack.vhd
........\.....\ex_p5_27_look_ahead_adder.vhd
........\.....\ex_p5_28_BCD_adder.vhd
........\.....\ex_p5_29_BCD_8_ADDER.vhd
........\.....\ex_p5_29_BCD_8_ADDER_old.vhd
........\.....\ex_p5_30_complementer.vhd
........\.....\ex_p5_7_mult8.vhd
........\.....\ex_p5_7_mult8_new.vhd
........\.....\ex_p5_7_mult_config.vhd
........\.....\ex_p5_8_mult_config_stmt.vhd
........\book6
........\.....\ab.txt
........\.....\ASC_DATA.TXT
........\.....\BIN_DATA.TXT
........\.....\ex6_2_filedemo.vhd
........\.....\ex6_2_filedemo2.vhd
........\.....\ex6_4_ser_adder.vhd
........\.....\ex6_4_testbench1.vhd
........\.....\ex_5_2_adder.vhd
........\.....\ex_6_4_2_mult8.vhd
........\.....\ex_6_4_2_mult8_tb.vhd
........\.....\ex_p6_11_file_write123.vhd
........\.....\ex_p6_12_bin_to_ascii.vhd
........\.....\ex_p6_12_write_bin_data.vhd
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