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shijinzhi

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2012-11-26
  • Size : 196kb
  • Downloaded :0次
  • Author :长***
  • About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
FPGA to make use of the decimal addition and subtraction! By a binary digital display
Packet file list
(Preview for download)
shijinzhi
.........\db
.........\..\lab4.asm.qmsg
.........\..\lab4.cbx.xml
.........\..\lab4.cmp.bpm
.........\..\lab4.cmp.cdb
.........\..\lab4.cmp.ecobp
.........\..\lab4.cmp.hdb
.........\..\lab4.cmp.logdb
.........\..\lab4.cmp.rdb
.........\..\lab4.cmp.tdb
.........\..\lab4.cmp0.ddb
.........\..\lab4.cmp_bb.cdb
.........\..\lab4.cmp_bb.hdb
.........\..\lab4.cmp_bb.logdb
.........\..\lab4.cmp_bb.rcf
.........\..\lab4.dbp
.........\..\lab4.db_info
.........\..\lab4.eco.cdb
.........\..\lab4.eds_overflow
.........\..\lab4.fit.qmsg
.........\..\lab4.hier_info
.........\..\lab4.hif
.........\..\lab4.map.bpm
.........\..\lab4.map.cdb
.........\..\lab4.map.ecobp
.........\..\lab4.map.hdb
.........\..\lab4.map.logdb
.........\..\lab4.map.qmsg
.........\..\lab4.map_bb.cdb
.........\..\lab4.map_bb.hdb
.........\..\lab4.map_bb.logdb
.........\..\lab4.pre_map.cdb
.........\..\lab4.pre_map.hdb
.........\..\lab4.psp
.........\..\lab4.pss
.........\..\lab4.rtlv.hdb
.........\..\lab4.rtlv_sg.cdb
.........\..\lab4.rtlv_sg_swap.cdb
.........\..\lab4.sgdiff.cdb
.........\..\lab4.sgdiff.hdb
.........\..\lab4.signalprobe.cdb
.........\..\lab4.sim.cvwf
.........\..\lab4.sim.hdb
.........\..\lab4.sim.qmsg
.........\..\lab4.sim.rdb
.........\..\lab4.sld_design_entry.sci
.........\..\lab4.sld_design_entry_dsc.sci
.........\..\lab4.syn_hier_info
.........\..\lab4.tan.qmsg
.........\..\lab4.tis_db_list.ddb
.........\..\prev_cmp_lab4.asm.qmsg
.........\..\prev_cmp_lab4.fit.qmsg
.........\..\prev_cmp_lab4.map.qmsg
.........\..\prev_cmp_lab4.qmsg
.........\..\prev_cmp_lab4.sim.qmsg
.........\..\prev_cmp_lab4.tan.qmsg
.........\..\wed.wsf
.........\lab4.asm.rpt
.........\lab4.cdf
.........\lab4.done
.........\lab4.dpf
.........\lab4.fit.rpt
.........\lab4.fit.smsg
.........\lab4.fit.summary
.........\lab4.flow.rpt
.........\lab4.map.rpt
.........\lab4.map.summary
.........\lab4.pin
.........\lab4.pof
.........\lab4.qpf
.........\lab4.qsf
.........\lab4.qws
.........\lab4.sim.rpt
.........\lab4.sof
.........\lab4.tan.rpt
.........\lab4.tan.summary
.........\lab4.vhd
.........\lab4.vhd.bak
.........\lab4.vwf
.........\lab4_assignment_defaults.qdf

.........\prev_cmp_lab4.qmsg
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