digital system design

DSD
...\24dcase
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...\.......\dec24c.cmd_log
...\.......\dec24c.ngc
...\.......\dec24c.ngr
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...\.......\dec24c.syr
...\.......\dec24c.vhd
...\.......\dec24c.xst
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...\.......\dec24c_tbw.ano
...\.......\dec24c_tbw.ant
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...\.......\isim
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...\.......\....\....\......\behavioral.h
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...\.......\....\....\hdllib.ref
...\.......\....\....\hdpdeps.ref
...\.......\....\....\sub00
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...\.......\....\....\.....\vhpl02.vho
...\.......\....\....\.....\vhpl03.vho
...\.......\isim.hdlsourcefiles
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...\.......\xst
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...\.......\...\........\..........\ntrc.scr
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...\.......\...\....\hdpdeps.ref
...\.......\...\....\sub00
...\.......\...\....\.....\vhpl00.vho
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...\.......\_xmsgs
...\.......\......\fuse.xmsgs
...\.......\......\vhpcomp.xmsgs
...\.......\......\xst.xmsgs
...\.......\__ISE_repository_24dcase.ise_.lock
...\2to4decoder
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...\...........\decoder24.cmd_log
...\...........\decoder24.fdo
...\...........\decoder24.ngc
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...\...........\decoder24.udo
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...\...........\decoder24_tbw.ant
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...\...........\isim
...\...........\....\work
...\...........\....\....\decoder24
...\...........\....\....\.........\behavioral.h
...\...........\....\....\.........\mingw
...\...........\....\....\.........\.....\behavioral.obj
...\...........\....\....\decoder24_tbw
...\...........\....\....\.............\mingw
...\...........\....\....\.............\.....\testbench_arch.obj
...\...........\....\....\.............\testbench_arch.h
...\...........\....\....\.............\xsimtestbench_arch.cpp
...\...........\....\....\hdllib.ref
...\...........\....\....\hdpdeps.ref
...\...........\....\....\sub00
...\...........\....\....\.....\vhpl00.vho

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