acces to send the data on the internet

S3E_Ethernet
............\board_files
............\...........\ddr_sdram
............\...........\.........\folder_details.txt
............\...........\.........\verilog
............\...........\.........\.......\vlog_bl2cl25
............\...........\.........\.......\............\example_design
............\...........\.........\.......\............\..............\datasheet.txt
............\...........\.........\.......\............\..............\design_testing.txt
............\...........\.........\.......\............\..............\par
............\...........\.........\.......\............\..............\...\create_ise.bat
............\...........\.........\.......\............\..............\...\icon_coregen.xco
............\...........\.........\.......\............\..............\...\ila_coregen.xco
............\...........\.........\.......\............\..............\...\ise_flow.bat
............\...........\.........\.......\............\..............\...\ise_run.txt
............\...........\.........\.......\............\..............\...\mem_interface_top.ut
............\...........\.........\.......\............\..............\...\readme.txt
............\...........\.........\.......\............\..............\...\set_ise_prop.txt
............\...........\.........\.......\............\..............\...\vlog_bl2cl25.bit
............\...........\.........\.......\............\..............\...\vlog_bl2cl25.ucf
............\...........\.........\.......\............\..............\sim
............\...........\.........\.......\............\..............\...\ddr_model.v
............\...........\.........\.......\............\..............\...\ddr_model_parameters.vh
............\...........\.........\.......\............\..............\...\glbl.v
............\...........\.........\.......\............\..............\...\sim.do
............\...........\.........\.......\............\..............\...\sim_tb_top.v
............\...........\.........\.......\............\..............\synth
............\...........\.........\.......\............\..............\.....\mem_interface_top_synp.sdc
............\...........\.........\.......\............\..............\.....\script_synp.tcl
............\...........\.........\.......\............\..............\.....\vlog_bl2cl25.lso
............\...........\.........\.......\............\..............\.....\vlog_bl2cl25.prj
............\...........\.........\.......\............\..............\vlog_bl2cl25.cpj
............\...........\.........\vhdl
............\...........\.........\....\vhdl_bl4cl2
............\...........\.........\....\...........\example_design
............\...........\.........\....\...........\..............\datasheet.txt
............\...........\.........\....\...........\..............\design_testing.txt
............\...........\.........\....\...........\..............\par
............\...........\.........\....\...........\..............\...\create_ise.bat
............\...........\.........\....\...........\..............\...\icon_coregen.xco
............\...........\.........\....\...........\..............\...\ila_coregen.xco
............\...........\.........\....\...........\..............\...\ise_flow.bat
............\...........\.........\....\...........\..............\...\ise_run.txt
............\...........\.........\....\...........\..............\...\mem_interface_top.ut
............\...........\.........\....\...........\..............\...\readme.txt
............\...........\.........\....\...........\..............\...\set_ise_prop.txt
............\...........\.........\....\...........\..............\...\vhdl_bl4cl2.bit
............\...........\.........\....\...........\..............\...\vhdl_bl4cl2.ucf
............\...........\.........\....\...........\..............\rtl
............\...........\.........\....\...........\..............\...\vhdl_bl4cl2.vhd
............\...........\.........\....\...........\..............\...\vhdl_bl4cl2_addr_gen_0.vhd
............\...........\.........\....\...........\...........

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