In Quartus using VHDL procedures for the preparation of a DDS. Including the register, accumulator, waveform memory

DDS
...\adder32b.bsf
...\adder32b.vhd
...\adder32b_wave.vwf
...\add_8.vhd
...\db
...\..\altsyncram_nu91.tdf
...\..\altsyncram_ss91.tdf
...\..\DDS.asm.qmsg
...\..\DDS.asm_labs.ddb
...\..\DDS.cbx.xml
...\..\DDS.cmp.cdb
...\..\DDS.cmp.hdb
...\..\DDS.cmp.kpt
...\..\DDS.cmp.logdb
...\..\DDS.cmp.rdb
...\..\DDS.cmp.tdb
...\..\DDS.cmp0.ddb
...\..\DDS.dbp
...\..\DDS.db_info
...\..\DDS.eco.cdb
...\..\DDS.eds_overflow
...\..\DDS.fit.qmsg
...\..\DDS.fnsim.hdb
...\..\DDS.fnsim.qmsg
...\..\DDS.hier_info
...\..\DDS.hif
...\..\DDS.map.cdb
...\..\DDS.map.hdb
...\..\DDS.map.logdb
...\..\DDS.map.qmsg
...\..\DDS.pre_map.cdb
...\..\DDS.pre_map.hdb
...\..\DDS.psp
...\..\DDS.rtlv.hdb
...\..\DDS.rtlv_sg.cdb
...\..\DDS.rtlv_sg_swap.cdb
...\..\DDS.sgdiff.cdb
...\..\DDS.sgdiff.hdb
...\..\DDS.signalprobe.cdb
...\..\DDS.sim.hdb
...\..\DDS.sim.qmsg
...\..\DDS.sim.rdb
...\..\DDS.sim.vwf
...\..\DDS.sld_design_entry.sci
...\..\DDS.sld_design_entry_dsc.sci
...\..\DDS.syn_hier_info
...\..\DDS.tan.qmsg
...\..\wed.zsf
...\DDS2.asm.rpt
...\DDS2.bdf
...\DDS2.done
...\DDS2.fit.rpt
...\DDS2.fit.smsg
...\DDS2.fit.summary
...\DDS2.flow.rpt
...\DDS2.map.rpt
...\DDS2.map.summary
...\DDS2.pin
...\DDS2.pof
...\DDS2.qpf
...\DDS2.qsf
...\DDS2.qws
...\DDS2.sim.rpt
...\DDS2.sof
...\DDS2.tan.rpt
...\DDS2.tan.summary
...\DDS2.vwf
...\Digit_conversion.bsf
...\Digit_conversion.vhd
...\mission
...\.......\adderN.flow.rpt
...\.......\adderN.map.rpt
...\.......\adderN.map.summary
...\.......\adderN.qpf
...\.......\adderN.qsf
...\.......\adderN.qws
...\.......\adderN.vhd
...\.......\db
...\.......\..\adderN.cbx.xml
...\.......\..\adderN.cmp.rdb
...\.......\..\adderN.db_info
...\.......\..\adderN.eco.cdb
...\.......\..\adderN.map.hdb
...\.......\..\adderN.map.qmsg
...\.......\..\adderN.sld_design_entry.sci
...\reg32b.bsf
...\reg32b.vhd
...\rom1.bsf
...\rom1.cmp
...\rom1.vhd
...\rom_data.mif

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