VHDL Clock practical procedures are experimental, you can download to use

shiyan10
........\db
........\..\add_sub_3kh.tdf
........\..\add_sub_nnh.tdf
........\..\shiyan10.asm.qmsg
........\..\shiyan10.cbx.xml
........\..\shiyan10.cmp.cdb
........\..\shiyan10.cmp.hdb
........\..\shiyan10.cmp.qrpt
........\..\shiyan10.cmp.rdb
........\..\shiyan10.cmp.tdb
........\..\shiyan10.cmp0.ddb
........\..\shiyan10.dbp
........\..\shiyan10.db_info
........\..\shiyan10.eco.cdb
........\..\shiyan10.eds_overflow
........\..\shiyan10.fit.qmsg
........\..\shiyan10.fnsim.hdb
........\..\shiyan10.fnsim.qmsg
........\..\shiyan10.frm.hdb
........\..\shiyan10.hier_info
........\..\shiyan10.hif
........\..\shiyan10.map.cdb
........\..\shiyan10.map.hdb
........\..\shiyan10.map.qmsg
........\..\shiyan10.pre_map.cdb
........\..\shiyan10.pre_map.hdb
........\..\shiyan10.psp
........\..\shiyan10.rtlv.hdb
........\..\shiyan10.rtlv_sg.cdb
........\..\shiyan10.rtlv_sg_swap.cdb
........\..\shiyan10.sgdiff.cdb
........\..\shiyan10.sgdiff.hdb
........\..\shiyan10.sim.hdb
........\..\shiyan10.sim.qmsg
........\..\shiyan10.sim.qrpt
........\..\shiyan10.sim.rdb
........\..\shiyan10.sld_design_entry.sci
........\..\shiyan10.sld_design_entry_dsc.sci
........\..\shiyan10.swb.qmsg
........\..\shiyan10.syn_hier_info
........\..\shiyan10.tan.qmsg
........\shiyan10.asm.rpt
........\shiyan10.done
........\shiyan10.fit.eqn
........\shiyan10.fit.rpt
........\shiyan10.fit.summary
........\shiyan10.flow.rpt
........\shiyan10.map.eqn
........\shiyan10.map.rpt
........\shiyan10.map.summary
........\shiyan10.pin
........\shiyan10.pof
........\shiyan10.qpf
........\shiyan10.qsf
........\shiyan10.qws
........\shiyan10.sim.rpt
........\shiyan10.tan.rpt
........\shiyan10.tan.summary
........\shiyan10.vhd
........\shiyan10.vwf
........\新建 文本文档.txt

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