I2C' s ip nuclear, Verilog realization, you can directly use in your projects. I2C is a simple and practical protocol.

I2C Controller Reference Design.doc
license.txt
qii
...\cmp_state.ini
...\db
...\..\cntr_4q7.tdf
...\..\cntr_pd8.tdf
...\..\cntr_re8.tdf
...\..\i2c.asm.qmsg
...\..\i2c.cmp.cdb
...\..\i2c.cmp.ddb
...\..\i2c.cmp.hdb
...\..\i2c.cmp.rdb
...\..\i2c.cmp.tdb
...\..\i2c.cmp0.ddb
...\..\i2c.db_info
...\..\i2c.eco.cdb
...\..\i2c.eda.qmsg
...\..\i2c.fit.qmsg
...\..\i2c.hier_info
...\..\i2c.hif
...\..\i2c.icc
...\..\i2c.map.cdb
...\..\i2c.map.hdb
...\..\i2c.map.qmsg
...\..\i2c.pre_map.cdb
...\..\i2c.pre_map.hdb
...\..\i2c.psp
...\..\i2c.rpp.qmsg
...\..\i2c.rtlv.hdb
...\..\i2c.rtlv_sg.cdb
...\..\i2c.rtlv_sg_swap.cdb
...\..\i2c.sgate.rvd
...\..\i2c.sgdiff.cdb
...\..\i2c.sgdiff.hdb
...\..\i2c.signalprobe.cdb
...\..\i2c.sld_design_entry.sci
...\..\i2c.sld_design_entry_dsc.sci
...\..\i2c.syn_hier_info
...\..\i2c.tan.qmsg
...\..\i2c_cmp.qrpt
...\..\i2c_hier_info
...\..\i2c_sim.qrpt
...\..\i2c_syn_hier_info
...\i2c.asm.rpt
...\i2c.done
...\i2c.eda.rpt
...\i2c.fit.eqn
...\i2c.fit.rpt
...\i2c.fit.summary
...\i2c.flow.rpt
...\i2c.map.eqn
...\i2c.map.rpt
...\i2c.map.summary
...\i2c.pin
...\i2c.pof
...\i2c.qpf
...\i2c.qsf
...\i2c.qws
...\i2c.sof
...\i2c.tan.rpt
...\i2c.tan.summary
...\i2c_assignment_defaults.qdf
...\quartus_nativelink_simulation.log
...\simulation
...\..........\modelsim
...\..........\........\i2c.vo
...\..........\........\i2c_modelsim.xrf
...\..........\........\i2c_v.sdo
...\..........\........\modelsim.ini
...\..........\........\modelsim_work
...\..........\........\.............\0modelsim_work.mgf
...\..........\........\.............\1modelsim_work.mgf
...\..........\........\.............\3modelsim_work.mgf
...\..........\........\.............\4modelsim_work.mgf
...\..........\........\.............\modelsim_work.lib
...\..........\........\.............\vcp.epr
...\..........\........\.............\vcp_cmd.log
...\..........\........\vsimsa.cfg
...\..........\vcs
...\..........\...\i2c.vo
...\..........\...\i2c_v.sdo
read_me.doc
read_me.txt
soc
...\i2c.vhd
...\i2c.vhd.bak
...\i2c_control.vhd
...\shift.vhd
...\uc_interface.vhd
...\upcnt4.vhd
testbench
.........\micro_master_tb.vhd
.........\micro_slave_tb.vhd
.........\micro_tb.vhd
.........\micro_test.do
.........\micro_test.vhd
.........\micro_test_post.do
.........\micro_test_post.vhd
.........\pullup.vhd

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