FPGA-based realization of the fft Abstract: This system is based on Altera Cyclone II family of embedded high-performance FPGA embedded IP core (Nios) soft-core processor, chip or replace the traditional high-performance single-chip DSP to realize the audio signals based on FFT analysis .

FFT的VHDL源代码
...............\FFT的VHDL源代码
...............\...............\and_gates.vhd
...............\...............\baseindex.vhd
...............\...............\but.vhd
...............\...............\butter_lib.vhd
...............\...............\comm.txt
...............\...............\control2.vhd
...............\...............\controller.vhd
...............\...............\counter.vhd
...............\...............\cycles_but.vhd
...............\...............\dff.vhd
...............\...............\divide.vhd
...............\...............\FLOAT2.PIF
...............\...............\FLOAT_RE.TXT
...............\...............\IEEE_TO_.PIF
...............\...............\ioadd.vhd
...............\...............\iod_staged.vhd
...............\...............\lblock.vhd
...............\...............\mult.vhd
...............\...............\multiply.vhd
...............\...............\mux_add.vhd
...............\...............\mux_but.vhd
...............\...............\negate.vhd
...............\...............\normalize.vhd
...............\...............\out_result.vhd
...............\...............\print.vhd
...............\...............\ram.vhd
...............\...............\ram_shift.vhd
...............\...............\rblock.vhd
...............\...............\result.txt
...............\...............\rom.vhd
...............\...............\romadd_gen.vhd
...............\...............\rom_ram.vhd
...............\...............\shift2.vhd
...............\...............\simili.lst
...............\...............\stage.vhd
...............\...............\subtractor.vhd
...............\...............\summer.vhd
...............\...............\swap.vhd
...............\...............\synth_main.vhd
...............\...............\synth_test.vhd
...............\...............\tcl_stacktrace.txt
...............\...............\transcript
...............\...............\使用说明请参看右侧注释====〉〉.txt

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